summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBob Wilson <bob.wilson@apple.com>2010-08-26 00:13:36 +0000
committerBob Wilson <bob.wilson@apple.com>2010-08-26 00:13:36 +0000
commit4629f423f8bacbcd67223a1c3ccd92022cc83d91 (patch)
tree6b873fb0f2e046da3c847161809f237e216b98d1
parent40f9798d0677976f872b00e70f16c8af9555f6e0 (diff)
downloadbcm5719-llvm-4629f423f8bacbcd67223a1c3ccd92022cc83d91.tar.gz
bcm5719-llvm-4629f423f8bacbcd67223a1c3ccd92022cc83d91.zip
Revert svn 107892 (with changes to work with trunk). It caused a crash if
a VLD result was not used (Radar 8355607). It should also fix pr7988, but I haven't verified that yet. llvm-svn: 112118
-rw-r--r--llvm/lib/Target/ARM/NEONPreAllocPass.cpp29
-rw-r--r--llvm/test/CodeGen/ARM/vld1.ll14
2 files changed, 42 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/NEONPreAllocPass.cpp b/llvm/lib/Target/ARM/NEONPreAllocPass.cpp
index 0ba11c83aba..0c1cfaead35 100644
--- a/llvm/lib/Target/ARM/NEONPreAllocPass.cpp
+++ b/llvm/lib/Target/ARM/NEONPreAllocPass.cpp
@@ -447,7 +447,34 @@ bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) {
continue;
if (FormsRegSequence(MI, FirstOpnd, NumRegs, Offset, Stride))
continue;
- llvm_unreachable("expected a REG_SEQUENCE");
+
+ MachineBasicBlock::iterator NextI = llvm::next(MBBI);
+ for (unsigned R = 0; R < NumRegs; ++R) {
+ MachineOperand &MO = MI->getOperand(FirstOpnd + R);
+ assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand");
+ unsigned VirtReg = MO.getReg();
+ assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
+ "expected a virtual register");
+
+ // For now, just assign a fixed set of adjacent registers.
+ // This leaves plenty of room for future improvements.
+ static const unsigned NEONDRegs[] = {
+ ARM::D0, ARM::D1, ARM::D2, ARM::D3,
+ ARM::D4, ARM::D5, ARM::D6, ARM::D7
+ };
+ MO.setReg(NEONDRegs[Offset + R * Stride]);
+
+ if (MO.isUse()) {
+ // Insert a copy from VirtReg.
+ BuildMI(MBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),MO.getReg())
+ .addReg(VirtReg, getKillRegState(MO.isKill()));
+ MO.setIsKill();
+ } else if (MO.isDef() && !MO.isDead()) {
+ // Add a copy to VirtReg.
+ BuildMI(MBB, NextI, DebugLoc(), TII->get(TargetOpcode::COPY), VirtReg)
+ .addReg(MO.getReg());
+ }
+ }
}
return Modified;
diff --git a/llvm/test/CodeGen/ARM/vld1.ll b/llvm/test/CodeGen/ARM/vld1.ll
index c61ea8c9a78..65c5932d66f 100644
--- a/llvm/test/CodeGen/ARM/vld1.ll
+++ b/llvm/test/CodeGen/ARM/vld1.ll
@@ -89,3 +89,17 @@ declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*) nounwind readonly
declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*) nounwind readonly
declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*) nounwind readonly
+
+; Radar 8355607
+; Do not crash if the vld1 result is not used.
+define void @unused_vld1_result() {
+entry:
+;CHECK: unused_vld1_result
+;CHECK: vld1.32
+ %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef)
+ call void @llvm.trap()
+ unreachable
+}
+
+declare void @llvm.trap() nounwind
+
OpenPOWER on IntegriCloud