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| author | Craig Topper <craig.topper@intel.com> | 2018-09-27 21:28:55 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-09-27 21:28:55 +0000 |
| commit | 45ad631b4c22bdd37222ef8033286e7d22a7a6d5 (patch) | |
| tree | f229fee4ff82b29e88ebae2ab1a97cd8965c71a0 | |
| parent | 7d234d66286a2a06016df7e63f23e1925e4caa38 (diff) | |
| download | bcm5719-llvm-45ad631b4c22bdd37222ef8033286e7d22a7a6d5.tar.gz bcm5719-llvm-45ad631b4c22bdd37222ef8033286e7d22a7a6d5.zip | |
[ScalarizeMaskedMemIntrin] Add some IR only test cases for masked gather expansion.
llvm-svn: 343272
| -rw-r--r-- | llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-gather.ll | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-gather.ll b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-gather.ll new file mode 100644 index 00000000000..53d5243615f --- /dev/null +++ b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-gather.ll @@ -0,0 +1,67 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S %s -scalarize-masked-mem-intrin -mtriple=x86_64-linux-gnu | FileCheck %s + +define <2 x i64> @scalarize_v2i64(<2 x i64*> %p, <2 x i1> %mask, <2 x i64> %passthru) { +; CHECK-LABEL: @scalarize_v2i64( +; CHECK-NEXT: [[MASK0:%.*]] = extractelement <2 x i1> [[MASK:%.*]], i32 0 +; CHECK-NEXT: br i1 [[MASK0]], label [[COND_LOAD:%.*]], label [[ELSE:%.*]] +; CHECK: cond.load: +; CHECK-NEXT: [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i32 0 +; CHECK-NEXT: [[LOAD0:%.*]] = load i64, i64* [[PTR0]], align 8 +; CHECK-NEXT: [[RES0:%.*]] = insertelement <2 x i64> undef, i64 [[LOAD0]], i32 0 +; CHECK-NEXT: br label [[ELSE]] +; CHECK: else: +; CHECK-NEXT: [[RES_PHI_ELSE:%.*]] = phi <2 x i64> [ [[RES0]], [[COND_LOAD]] ], [ undef, [[TMP0:%.*]] ] +; CHECK-NEXT: [[MASK1:%.*]] = extractelement <2 x i1> [[MASK]], i32 1 +; CHECK-NEXT: br i1 [[MASK1]], label [[COND_LOAD1:%.*]], label [[ELSE2:%.*]] +; CHECK: cond.load1: +; CHECK-NEXT: [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i32 1 +; CHECK-NEXT: [[LOAD1:%.*]] = load i64, i64* [[PTR1]], align 8 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <2 x i64> [[RES_PHI_ELSE]], i64 [[LOAD1]], i32 1 +; CHECK-NEXT: br label [[ELSE2]] +; CHECK: else2: +; CHECK-NEXT: [[RES_PHI_SELECT:%.*]] = phi <2 x i64> [ [[RES1]], [[COND_LOAD1]] ], [ [[RES_PHI_ELSE]], [[ELSE]] ] +; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK]], <2 x i64> [[RES_PHI_SELECT]], <2 x i64> [[PASSTHRU:%.*]] +; CHECK-NEXT: ret <2 x i64> [[TMP1]] +; + %ret = call <2 x i64> @llvm.masked.gather.v2i64.v2p0i64(<2 x i64*> %p, i32 8, <2 x i1> %mask, <2 x i64> %passthru) + ret <2 x i64> %ret +} + +define <2 x i64> @scalarize_v2i64_ones_mask(<2 x i64*> %p, <2 x i64> %passthru) { +; CHECK-LABEL: @scalarize_v2i64_ones_mask( +; CHECK-NEXT: [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i32 0 +; CHECK-NEXT: [[LOAD0:%.*]] = load i64, i64* [[PTR0]], align 8 +; CHECK-NEXT: [[RES0:%.*]] = insertelement <2 x i64> undef, i64 [[LOAD0]], i32 0 +; CHECK-NEXT: [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i32 1 +; CHECK-NEXT: [[LOAD1:%.*]] = load i64, i64* [[PTR1]], align 8 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <2 x i64> [[RES0]], i64 [[LOAD1]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> <i1 true, i1 true>, <2 x i64> [[RES1]], <2 x i64> [[PASSTHRU:%.*]] +; CHECK-NEXT: ret <2 x i64> [[TMP1]] +; + %ret = call <2 x i64> @llvm.masked.gather.v2i64.v2p0i64(<2 x i64*> %p, i32 8, <2 x i1> <i1 true, i1 true>, <2 x i64> %passthru) + ret <2 x i64> %ret +} + +define <2 x i64> @scalarize_v2i64_zero_mask(<2 x i64*> %p, <2 x i64> %passthru) { +; CHECK-LABEL: @scalarize_v2i64_zero_mask( +; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> zeroinitializer, <2 x i64> undef, <2 x i64> [[PASSTHRU:%.*]] +; CHECK-NEXT: ret <2 x i64> [[TMP1]] +; + %ret = call <2 x i64> @llvm.masked.gather.v2i64.v2p0i64(<2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 false>, <2 x i64> %passthru) + ret <2 x i64> %ret +} + +define <2 x i64> @scalarize_v2i64_const_mask(<2 x i64*> %p, <2 x i64> %passthru) { +; CHECK-LABEL: @scalarize_v2i64_const_mask( +; CHECK-NEXT: [[PTR1:%.*]] = extractelement <2 x i64*> [[P:%.*]], i32 1 +; CHECK-NEXT: [[LOAD1:%.*]] = load i64, i64* [[PTR1]], align 8 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <2 x i64> undef, i64 [[LOAD1]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> <i1 false, i1 true>, <2 x i64> [[RES1]], <2 x i64> [[PASSTHRU:%.*]] +; CHECK-NEXT: ret <2 x i64> [[TMP1]] +; + %ret = call <2 x i64> @llvm.masked.gather.v2i64.v2p0i64(<2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 true>, <2 x i64> %passthru) + ret <2 x i64> %ret +} + +declare <2 x i64> @llvm.masked.gather.v2i64.v2p0i64(<2 x i64*>, i32, <2 x i1>, <2 x i64>) |

