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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-19 18:11:16 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-19 18:11:16 +0000 |
| commit | 4505f3a73db80414c9fed0049b8a75b6c4d1b1d8 (patch) | |
| tree | 80790491356d4a76a7428835977c66d90fd5151a | |
| parent | 3a7ce252ccfe74321e54289322dfc2a1838d5fba (diff) | |
| download | bcm5719-llvm-4505f3a73db80414c9fed0049b8a75b6c4d1b1d8.tar.gz bcm5719-llvm-4505f3a73db80414c9fed0049b8a75b6c4d1b1d8.zip | |
R600/SI: Fix test to prepare for scheduler
llvm-svn: 218131
| -rw-r--r-- | llvm/test/CodeGen/R600/smrd.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/R600/smrd.ll b/llvm/test/CodeGen/R600/smrd.ll index 8bc7fd81235..b63b01e659e 100644 --- a/llvm/test/CodeGen/R600/smrd.ll +++ b/llvm/test/CodeGen/R600/smrd.ll @@ -40,10 +40,10 @@ entry: ; CHECK-DAG: S_MOV_B32 s[[SLO:[0-9]+]], 0 ; CHECK-DAG: S_MOV_B32 s[[SHI:[0-9]+]], 4 ; FIXME: We don't need to copy these values to VGPRs -; CHECK-DAG: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[SHI]] ; CHECK-DAG: V_MOV_B32_e32 v[[VLO:[0-9]+]], s[[SLO]] +; CHECK-DAG: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[SHI]] ; FIXME: We should be able to use S_LOAD_DWORD here -; CHECK: BUFFER_LOAD_DWORD v{{[0-9]+}}, v{{\[}}[[VLO]]:[[VHI]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0 +; CHECK: BUFFER_LOAD_DWORD v{{[0-9]+}}, v{{\[}}[[VLO]]:[[VHI]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0 addr64 ; CHECK: S_ENDPGM define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) { entry: |
