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authorChris Lattner <sabre@nondot.org>2003-08-04 21:08:29 +0000
committerChris Lattner <sabre@nondot.org>2003-08-04 21:08:29 +0000
commit44cdcf013f73f209d1e140d97e9d8c9d0211a364 (patch)
tree7e275464de9f345a7a2c59f5839480835d7b12cb
parent0d74debd077cca13b17e9c58e6d8790fa3bd2ac0 (diff)
downloadbcm5719-llvm-44cdcf013f73f209d1e140d97e9d8c9d0211a364.tar.gz
bcm5719-llvm-44cdcf013f73f209d1e140d97e9d8c9d0211a364.zip
Change comments into something that TableGen can read!
llvm-svn: 7580
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td16
1 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index fa3b04899a5..2e6538e22ac 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -76,6 +76,10 @@ class Imp<list<Register> uses, list<Register> defs> {
list<Register> Defs = defs;
}
+class Pattern<dag P> {
+ dag Pattern = P;
+}
+
// Prefix byte classes which are used to indicate to the ad-hoc machine code
// emitter that various prefix bytes are required.
@@ -212,12 +216,12 @@ let isTwoAddress = 1 in { // Define some helper classes to make defs shorter.
}
// Arithmetic...
-def ADDrr8 : I2A8 <"add", 0x00, MRMDestReg>; // R8 += R8 (set r8 (plus r8 r8))
-def ADDrr16 : I2A16<"add", 0x01, MRMDestReg>, OpSize; // R16 += R16 (set r16 (plus r16 r16))
-def ADDrr32 : I2A32<"add", 0x01, MRMDestReg>; // R32 += R32 (set r32 (plus r32 r32))
-def ADDri8 : I2A8 <"add", 0x80, MRMS0r >; // R8 += imm8 (set r8 (plus r8 imm8))
-def ADDri16 : I2A16<"add", 0x81, MRMS0r >, OpSize; // R16 += imm16 (set r16 (plus r16 imm16))
-def ADDri32 : I2A32<"add", 0x81, MRMS0r >; // R32 += imm32 (set r32 (plus r32 imm32))
+def ADDrr8 : I2A8 <"add", 0x00, MRMDestReg>, Pattern<(set R8 , (plus R8 , R8))>;
+def ADDrr16 : I2A16<"add", 0x01, MRMDestReg>, OpSize, Pattern<(set R16, (plus R16, R16))>;
+def ADDrr32 : I2A32<"add", 0x01, MRMDestReg>, Pattern<(set R32, (plus R32, R32))>;
+def ADDri8 : I2A8 <"add", 0x80, MRMS0r >, Pattern<(set R8 , (plus R8 , imm8))>;
+def ADDri16 : I2A16<"add", 0x81, MRMS0r >, OpSize, Pattern<(set R16, (plus R16, imm16))>;
+def ADDri32 : I2A32<"add", 0x81, MRMS0r >, Pattern<(set R32, (plus R32, imm32))>;
def ADCrr32 : I2A32<"adc", 0x11, MRMDestReg>; // R32 += imm32+Carry
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