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author | Wang, Pengfei <pengfei.wang@intel.com> | 2019-12-01 13:35:53 +0800 |
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committer | Wang, Pengfei <pengfei.wang@intel.com> | 2019-12-02 18:19:32 +0800 |
commit | 44b9942898c7167ed95cccef4c3da3d2113e11e8 (patch) | |
tree | f427511e4679b15561f55f82a32744cca8123ff0 | |
parent | a9d6b0e5444741d08ff1df7cf71d1559e7fefc1f (diff) | |
download | bcm5719-llvm-44b9942898c7167ed95cccef4c3da3d2113e11e8.tar.gz bcm5719-llvm-44b9942898c7167ed95cccef4c3da3d2113e11e8.zip |
[X86] Add initialization of MXCSR in llvm-exegesis
Summary: This patch is used to initialize the new added register MXCSR.
Reviewers: craig.topper, RKSimon
Subscribers: tschuett, courbet, llvm-commits, LiuChen3
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70874
-rw-r--r-- | llvm/test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s | 3 | ||||
-rw-r--r-- | llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 17 |
2 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s b/llvm/test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s index 84a928cb23d..c629351690c 100644 --- a/llvm/test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s +++ b/llvm/test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s @@ -5,3 +5,6 @@ CHECK: mode: uops CHECK-NEXT: key: CHECK-NEXT: instructions: CHECK-NEXT: VFMADDSS4rm +CHECK: register_initial_values: +# FIXME: This will be changed to CHECK by the following patch that modeling MXCSR to VFMADDSS. +CHECK-NOT: MXCSR diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp index 6cf3d465dd9..974b2c938c3 100644 --- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp +++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp @@ -439,6 +439,8 @@ struct ConstantInliner { std::vector<MCInst> popFlagAndFinalize(); + std::vector<MCInst> loadMXCSRAndFinalize(bool HasAVX); + private: ConstantInliner &add(const MCInst &Inst) { Instructions.push_back(Inst); @@ -499,6 +501,19 @@ std::vector<MCInst> ConstantInliner::popFlagAndFinalize() { return std::move(Instructions); } +std::vector<MCInst> ConstantInliner::loadMXCSRAndFinalize(bool HasAVX) { + add(allocateStackSpace(4)); + add(fillStackSpace(X86::MOV32mi, 0, 0x1f80)); // Mask all FP exceptions + add(MCInstBuilder(HasAVX ? X86::VLDMXCSR : X86::LDMXCSR) + // Address = ESP + .addReg(X86::RSP) // BaseReg + .addImm(1) // ScaleAmt + .addReg(0) // IndexReg + .addImm(0) // Disp + .addReg(0)); // Segment + return std::move(Instructions); +} + void ConstantInliner::initStack(unsigned Bytes) { assert(Constant_.getBitWidth() <= Bytes * 8 && "Value does not have the correct size"); @@ -699,6 +714,8 @@ std::vector<MCInst> ExegesisX86Target::setRegTo(const MCSubtargetInfo &STI, } if (Reg == X86::EFLAGS) return CI.popFlagAndFinalize(); + if (Reg == X86::MXCSR) + return CI.loadMXCSRAndFinalize(STI.getFeatureBits()[X86::FeatureAVX]); return {}; // Not yet implemented. } |