summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2010-10-08 00:47:59 +0000
committerJim Grosbach <grosbach@apple.com>2010-10-08 00:47:59 +0000
commit42a07e8545cd61c39de05db7b343113a55337695 (patch)
tree9213a855cca6a7b9e0cf10ecc6bc3ee8fc6d6247
parent138532af064b61d6e68f2936e5675226fe77fc33 (diff)
downloadbcm5719-llvm-42a07e8545cd61c39de05db7b343113a55337695.tar.gz
bcm5719-llvm-42a07e8545cd61c39de05db7b343113a55337695.zip
Add test file for simple ARM binary encodings with MC
llvm-svn: 116024
-rw-r--r--llvm/test/MC/ARM/simple-encoding.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/simple-encoding.ll b/llvm/test/MC/ARM/simple-encoding.ll
new file mode 100644
index 00000000000..af7cf71adec
--- /dev/null
+++ b/llvm/test/MC/ARM/simple-encoding.ll
@@ -0,0 +1,18 @@
+;RUN: llc -mtriple=armv7-apple-darwin -show-mc-encoding < %s | FileCheck %s
+
+
+;FIXME: Once the ARM integrated assembler is up and going, these sorts of tests
+; should run on .s source files rather than using llc to generate the
+; assembly.
+
+define i32 @foo(i32 %a, i32 %b) nounwind ssp {
+entry:
+; CHECK: foo
+; CHECK: 0xf0,0x00,0xf0,0x07
+; CHECK: 0x1e,0xff,0x2f,0x01
+
+ tail call void @llvm.trap()
+ ret i32 undef
+}
+
+declare void @llvm.trap() nounwind
OpenPOWER on IntegriCloud