Mips specific inline assembler constraint 'R'

'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.

llvm-svn: 176453

2 files changed, 4 insertions, 3 deletions

diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index c63ccce9caf..9ff4ac08ee0 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -4486,6 +4486,9 @@ public:
     case 'x': // hilo register pair
       Info.setAllowsRegister();
       return true;
+    case 'R': // An address tha can be used in a non-macro load or store
+      Info.setAllowsMemory();
+      return true;
     }
   }
 
diff --git a/clang/test/CodeGen/mips-constraint-regs.c b/clang/test/CodeGen/mips-constraint-regs.c
index c42a888fcfb..0d533f5fc77 100644
--- a/clang/test/CodeGen/mips-constraint-regs.c
+++ b/clang/test/CodeGen/mips-constraint-regs.c
@@ -2,9 +2,7 @@
 // RUN: | FileCheck %s
 
 // This checks that the frontend will accept inline asm constraints
-// c', 'l' and 'x'. Semantic checking will happen in the
-// llvm backend. Any bad constraint letters will cause the frontend to
-// error out.
+// c', 'l' and 'x'.
 
 int main()
 {