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| author | Craig Topper <craig.topper@intel.com> | 2019-02-08 17:07:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-02-08 17:07:54 +0000 |
| commit | 41a1792b15830ecaf1a78f5fd9689c75ca3af71d (patch) | |
| tree | aa6fd7cddb7f18788480b56846f2b13c82384978 | |
| parent | 6bfd721571a5ad15642e279798186fa79eb2b90e (diff) | |
| download | bcm5719-llvm-41a1792b15830ecaf1a78f5fd9689c75ca3af71d.tar.gz bcm5719-llvm-41a1792b15830ecaf1a78f5fd9689c75ca3af71d.zip | |
[X86] Remove isReMaterializable from X87 floating point constant loads and constant pool loads.
Summary: These instructions update FPSW so they aren't generically safe to rematerialize into any location if FPSW is live for a comparison result. They also use FPCW for exception masking control. Though the only exception they can generate is stack overflow and we manage the stack ourselves so that's not really going to occur.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57934
llvm-svn: 353536
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFPStack.td | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 1 |
2 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFPStack.td b/llvm/lib/Target/X86/X86InstrFPStack.td index bad03b6df96..b8be5eb8693 100644 --- a/llvm/lib/Target/X86/X86InstrFPStack.td +++ b/llvm/lib/Target/X86/X86InstrFPStack.td @@ -421,8 +421,7 @@ let SchedRW = [WriteLoad] in { let canFoldAsLoad = 1 in { def LD_Fp32m : FpIf32<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP, [(set RFP32:$dst, (loadf32 addr:$src))]>; -let isReMaterializable = 1 in - def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP, +def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP, [(set RFP64:$dst, (loadf64 addr:$src))]>; def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP, [(set RFP80:$dst, (loadf80 addr:$src))]>; @@ -548,7 +547,7 @@ def XCH_F : FPI<0xD9, MRM1r, (outs), (ins RSTi:$op), "fxch\t$op">; } // Floating point constant loads. -let isReMaterializable = 1, SchedRW = [WriteZero] in { +let SchedRW = [WriteZero] in { def LD_Fp032 : FpIf32<(outs RFP32:$dst), (ins), ZeroArgFP, [(set RFP32:$dst, fpimm0)]>; def LD_Fp132 : FpIf32<(outs RFP32:$dst), (ins), ZeroArgFP, diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 3956bce26f5..91939398d95 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -482,7 +482,6 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr &MI, case X86::MOV16rm: case X86::MOV32rm: case X86::MOV64rm: - case X86::LD_Fp64m: case X86::MOVSSrm: case X86::MOVSDrm: case X86::MOVAPSrm: |
