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| author | Bob Wilson <bob.wilson@apple.com> | 2009-08-07 23:53:05 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-08-07 23:53:05 +0000 |
| commit | 40ff4a190f60241bd79073a3bf2d6d94fb077124 (patch) | |
| tree | dfed568de330825d8f24358c61f68ad56e1742f9 | |
| parent | b68df0bc422827ab6b6b31865529014f5eff6ac3 (diff) | |
| download | bcm5719-llvm-40ff4a190f60241bd79073a3bf2d6d94fb077124.tar.gz bcm5719-llvm-40ff4a190f60241bd79073a3bf2d6d94fb077124.zip | |
Add new intrinsics for Neon VTRN, VZIP and VUZP operations. Modeling these
as vector shuffles did not work out well. Shuffles that produce double-wide
vectors accurately represent the operation but make it hard to do anything
with the results. I considered splitting them up into 2 shuffles, one to
write each register separately, but there doesn't seem to be a good way to
reunite them for codegen.
llvm-svn: 78437
| -rw-r--r-- | llvm/include/llvm/IntrinsicsARM.td | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/include/llvm/IntrinsicsARM.td b/llvm/include/llvm/IntrinsicsARM.td index efe5bff4371..e9a7e2e91da 100644 --- a/llvm/include/llvm/IntrinsicsARM.td +++ b/llvm/include/llvm/IntrinsicsARM.td @@ -66,6 +66,12 @@ let TargetPrefix = "arm" in { // All intrinsics start with "llvm.arm.". LLVMTruncatedElementVectorType<0>, LLVMTruncatedElementVectorType<0>], [IntrNoMem]>; + class Neon_2Result_Intrinsic + : Intrinsic<[llvm_anyint_ty, LLVMMatchType<0>], + [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>; + class Neon_2Result_Float_Intrinsic + : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>], + [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>; class Neon_CvtFxToFP_Intrinsic : Intrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; class Neon_CvtFPToFx_Intrinsic @@ -288,6 +294,18 @@ def int_arm_neon_vqmovnsu : Neon_1Arg_Narrow_Intrinsic; def int_arm_neon_vmovls : Neon_1Arg_Long_Intrinsic; def int_arm_neon_vmovlu : Neon_1Arg_Long_Intrinsic; +// Vector Transpose. +def int_arm_neon_vtrni : Neon_2Result_Intrinsic; +def int_arm_neon_vtrnf : Neon_2Result_Float_Intrinsic; + +// Vector Interleave (vzip). +def int_arm_neon_vzipi : Neon_2Result_Intrinsic; +def int_arm_neon_vzipf : Neon_2Result_Float_Intrinsic; + +// Vector Deinterleave (vuzp). +def int_arm_neon_vuzpi : Neon_2Result_Intrinsic; +def int_arm_neon_vuzpf : Neon_2Result_Float_Intrinsic; + let TargetPrefix = "arm" in { // De-interleaving vector loads from N-element structures. |

