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author | Chandler Carruth <chandlerc@gmail.com> | 2014-08-04 21:29:59 +0000 |
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committer | Chandler Carruth <chandlerc@gmail.com> | 2014-08-04 21:29:59 +0000 |
commit | 40dbd382ad1b4dc3c2243622334d896f64c72661 (patch) | |
tree | 29b0c461870022ff6b8a7308977c088a46dfa167 | |
parent | 6c3e38522acf3e40097c0a8982b8dbd487867ad3 (diff) | |
download | bcm5719-llvm-40dbd382ad1b4dc3c2243622334d896f64c72661.tar.gz bcm5719-llvm-40dbd382ad1b4dc3c2243622334d896f64c72661.zip |
[SDAG] Fix a really, really terrible bug in the DAG combiner.
This code is completely wrong. It is also dead, as if it were to *ever*
run, it would crash. Fortunately, after my work to the combiner, it is
at least *possible* to reach the code, and llvm-stress has found a test
case. Thanks to Patrick for reporting.
It would be really good if anyone who remembers how this code works and
what it was intended to do could add some more obvious test coverage
instead of my completely contrived and reduced test case. My test case
was so brittle I left a bread crumb comment in it to help the next
person to stumble on it and not know what it was actually testing for.
llvm-svn: 214785
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/select.ll | 38 |
2 files changed, 39 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index cb9e13c331d..035ce57bf0f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -11100,8 +11100,8 @@ SDValue DAGCombiner::SimplifySelect(SDLoc DL, SDValue N0, SCC.getOperand(0), SCC.getOperand(1), SCC.getOperand(4)); AddToWorklist(SETCC.getNode()); - return DAG.getSelect(SDLoc(SCC), SCC.getValueType(), - SCC.getOperand(2), SCC.getOperand(3), SETCC); + return DAG.getSelect(SDLoc(SCC), SCC.getValueType(), SETCC, + SCC.getOperand(2), SCC.getOperand(3)); } return SCC; diff --git a/llvm/test/CodeGen/X86/select.ll b/llvm/test/CodeGen/X86/select.ll index 654e8652cfc..7e6f1532141 100644 --- a/llvm/test/CodeGen/X86/select.ll +++ b/llvm/test/CodeGen/X86/select.ll @@ -364,4 +364,40 @@ define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) { %tmp1 = select i1 %cc, i32 3, i32 2 %tmp2 = shl i32 %a, %tmp1 ret i32 %tmp2 -}
\ No newline at end of file +} + +define void @test19() { +; This is a massive reduction of an llvm-stress test case that generates +; interesting chains feeding setcc and eventually a f32 select operation. This +; is intended to exercise the SELECT formation in the DAG combine simplifying +; a simplified select_cc node. If it it regresses and is no longer triggering +; that code path, it can be deleted. +; +; CHECK-LABEL: @test19 +; CHECK: testb +; CHECK: cmpl +; CHECK: ucomiss + +BB: + br label %CF + +CF: + %Cmp10 = icmp ule i8 undef, undef + br i1 %Cmp10, label %CF, label %CF250 + +CF250: + %E12 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2 + %Cmp32 = icmp ugt i1 %Cmp10, false + br i1 %Cmp32, label %CF, label %CF242 + +CF242: + %Cmp38 = icmp uge i32 %E12, undef + %FC = uitofp i1 %Cmp38 to float + %Sl59 = select i1 %Cmp32, float %FC, float undef + %Cmp60 = fcmp ugt float undef, undef + br i1 %Cmp60, label %CF242, label %CF244 + +CF244: + %B122 = fadd float %Sl59, undef + ret void +} |