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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-06-25 13:16:48 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-06-25 13:16:48 +0000
commit4069e24bd3b00a2c510c63af2e9271111ae9c3eb (patch)
treec373310f3bd7a024d9d1a03cea6770e72c3c95b3
parentaaaf28971d621a323fc0c33c18ad509884d176cf (diff)
downloadbcm5719-llvm-4069e24bd3b00a2c510c63af2e9271111ae9c3eb.tar.gz
bcm5719-llvm-4069e24bd3b00a2c510c63af2e9271111ae9c3eb.zip
[PowerPC] Add extended subtract mnemonics
This adds support for the extended subtract mnemonics to the asm parser: subi subis subic subic. sub sub. subc subc. llvm-svn: 184832
-rw-r--r--llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp40
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.td14
-rw-r--r--llvm/test/MC/PowerPC/ppc64-encoding-ext.s20
3 files changed, 73 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index 2aed3245507..d426ba0b01f 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -432,6 +432,46 @@ ProcessInstruction(MCInst &Inst,
Inst = TmpInst;
break;
}
+ case PPC::SUBI: {
+ MCInst TmpInst;
+ int64_t N = Inst.getOperand(2).getImm();
+ TmpInst.setOpcode(PPC::ADDI);
+ TmpInst.addOperand(Inst.getOperand(0));
+ TmpInst.addOperand(Inst.getOperand(1));
+ TmpInst.addOperand(MCOperand::CreateImm(-N));
+ Inst = TmpInst;
+ break;
+ }
+ case PPC::SUBIS: {
+ MCInst TmpInst;
+ int64_t N = Inst.getOperand(2).getImm();
+ TmpInst.setOpcode(PPC::ADDIS);
+ TmpInst.addOperand(Inst.getOperand(0));
+ TmpInst.addOperand(Inst.getOperand(1));
+ TmpInst.addOperand(MCOperand::CreateImm(-N));
+ Inst = TmpInst;
+ break;
+ }
+ case PPC::SUBIC: {
+ MCInst TmpInst;
+ int64_t N = Inst.getOperand(2).getImm();
+ TmpInst.setOpcode(PPC::ADDIC);
+ TmpInst.addOperand(Inst.getOperand(0));
+ TmpInst.addOperand(Inst.getOperand(1));
+ TmpInst.addOperand(MCOperand::CreateImm(-N));
+ Inst = TmpInst;
+ break;
+ }
+ case PPC::SUBICo: {
+ MCInst TmpInst;
+ int64_t N = Inst.getOperand(2).getImm();
+ TmpInst.setOpcode(PPC::ADDICo);
+ TmpInst.addOperand(Inst.getOperand(0));
+ TmpInst.addOperand(Inst.getOperand(1));
+ TmpInst.addOperand(MCOperand::CreateImm(-N));
+ Inst = TmpInst;
+ break;
+ }
case PPC::SLWI: {
MCInst TmpInst;
int64_t N = Inst.getOperand(2).getImm();
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index ee992c03cb9..5b99a66e494 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -2276,6 +2276,20 @@ def : InstAlias<"not. $rA, $rB", (NOR8o g8rc:$rA, g8rc:$rB, g8rc:$rB)>;
def LAx : PPCAsmPseudo<"la $rA, $addr", (ins gprc:$rA, memri:$addr)>;
+def SUBI : PPCAsmPseudo<"subi $rA, $rB, $imm",
+ (ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
+def SUBIS : PPCAsmPseudo<"subis $rA, $rB, $imm",
+ (ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
+def SUBIC : PPCAsmPseudo<"subic $rA, $rB, $imm",
+ (ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
+def SUBICo : PPCAsmPseudo<"subic. $rA, $rB, $imm",
+ (ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
+
+def : InstAlias<"sub $rA, $rB, $rC", (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
+def : InstAlias<"sub. $rA, $rB, $rC", (SUBF8o g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
+def : InstAlias<"subc $rA, $rB, $rC", (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
+def : InstAlias<"subc. $rA, $rB, $rC", (SUBFC8o g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
+
def SLWI : PPCAsmPseudo<"slwi $rA, $rS, $n",
(ins gprc:$rA, gprc:$rS, u5imm:$n)>;
def SRWI : PPCAsmPseudo<"srwi $rA, $rS, $n",
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
index f6bfa6916a7..a194d1a344f 100644
--- a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
@@ -1788,7 +1788,25 @@
# FIXME: Condition register logical mnemonics
-# FIXME: Subtract mnemonics
+# Subtract mnemonics
+
+# CHECK: addi 2, 3, -128 # encoding: [0x38,0x43,0xff,0x80]
+ subi 2, 3, 128
+# CHECK: addis 2, 3, -128 # encoding: [0x3c,0x43,0xff,0x80]
+ subis 2, 3, 128
+# CHECK: addic 2, 3, -128 # encoding: [0x30,0x43,0xff,0x80]
+ subic 2, 3, 128
+# CHECK: addic. 2, 3, -128 # encoding: [0x34,0x43,0xff,0x80]
+ subic. 2, 3, 128
+
+# CHECK: subf 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x50]
+ sub 2, 3, 4
+# CHECK: subf. 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x51]
+ sub. 2, 3, 4
+# CHECK: subfc 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x10]
+ subc 2, 3, 4
+# CHECK: subfc. 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x11]
+ subc. 2, 3, 4
# Compare mnemonics
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