[X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext

This fixes an issue with matching trunc -> assertsext -> zext on x86-64, which would not zero the high 32-bits. See PR20494 for details.
Recommitting - This time, with a hopefully working test.

Differential Revision: http://reviews.llvm.org/D6128

llvm-svn: 221672

2 files changed, 17 insertions, 0 deletions

diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td
index bf25672b2f6..117b6ff2103 100644
--- a/llvm/lib/Target/X86/X86InstrCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrCompiler.td
@@ -1191,6 +1191,7 @@ def def32 : PatLeaf<(i32 GR32:$src), [{
   return N->getOpcode() != ISD::TRUNCATE &&
          N->getOpcode() != TargetOpcode::EXTRACT_SUBREG &&
          N->getOpcode() != ISD::CopyFromReg &&
+         N->getOpcode() != ISD::AssertSext &&
          N->getOpcode() != X86ISD::CMOV;
 }]>;
 
diff --git a/llvm/test/CodeGen/X86/TruncAssertZext.ll b/llvm/test/CodeGen/X86/TruncAssertZext.ll
new file mode 100644
index 00000000000..2d78b5fadc2
--- /dev/null
+++ b/llvm/test/CodeGen/X86/TruncAssertZext.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -O2 -march=x86-64 | FileCheck %s

+; Checks that a zeroing mov is inserted for the trunc/zext pair even when

+; the source of the zext is an AssertSext node

+; PR20494

+

+define i64 @main(i64 %a) { 

+; CHECK-LABEL: main

+; CHECK: movl %e{{..}}, %eax

+; CHECK: ret

+  %or = or i64 %a, -2

+  %trunc = trunc i64 %or to i32

+  br label %l

+l:

+  %ext = zext i32 %trunc to i64

+  ret i64 %ext

+}