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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-10-13 15:47:59 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-10-13 15:47:59 +0000 |
commit | 3f3a2751e0f9beec20d45b6b8ba2fceb4e7d38d3 (patch) | |
tree | 4961999e3d8b205deaf4bd5119a4bf32b2f1f7ac | |
parent | 799c3d3a04ad6b2405a0735c596671d6a2cd2d57 (diff) | |
download | bcm5719-llvm-3f3a2751e0f9beec20d45b6b8ba2fceb4e7d38d3.tar.gz bcm5719-llvm-3f3a2751e0f9beec20d45b6b8ba2fceb4e7d38d3.zip |
R600/SI: Minor cleanup of function
llvm-svn: 219616
-rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index fc2c63d6618..334f4259d48 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -1211,26 +1211,28 @@ bool SIInstrInfo::canReadVGPR(const MachineInstr &MI, unsigned OpNo) const { void SIInstrInfo::legalizeOpWithMove(MachineInstr *MI, unsigned OpIdx) const { MachineBasicBlock::iterator I = MI; + MachineBasicBlock *MBB = MI->getParent(); MachineOperand &MO = MI->getOperand(OpIdx); - MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo(); + MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); unsigned RCID = get(MI->getOpcode()).OpInfo[OpIdx].RegClass; const TargetRegisterClass *RC = RI.getRegClass(RCID); unsigned Opcode = AMDGPU::V_MOV_B32_e32; - if (MO.isReg()) { + if (MO.isReg()) Opcode = AMDGPU::COPY; - } else if (RI.isSGPRClass(RC)) { + else if (RI.isSGPRClass(RC)) Opcode = AMDGPU::S_MOV_B32; - } + const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC); - if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC)) { + if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC)) VRC = &AMDGPU::VReg_64RegClass; - } else { + else VRC = &AMDGPU::VReg_32RegClass; - } + unsigned Reg = MRI.createVirtualRegister(VRC); - BuildMI(*MI->getParent(), I, MI->getParent()->findDebugLoc(I), get(Opcode), - Reg).addOperand(MO); + DebugLoc DL = MBB->findDebugLoc(I); + BuildMI(*MI->getParent(), I, DL, get(Opcode), Reg) + .addOperand(MO); MO.ChangeToRegister(Reg, false); } |