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authorRichard Smith <richard-llvm@metafoo.co.uk>2019-10-10 21:40:56 +0000
committerRichard Smith <richard-llvm@metafoo.co.uk>2019-10-10 21:40:56 +0000
commit3f2d42baa010c5295a8ca5c57a2f15a40def7674 (patch)
tree055a70f2b289359b47213a470484653f18196fc8
parentb556085d811027a4ed50d2a5505010c7a9ac9819 (diff)
downloadbcm5719-llvm-3f2d42baa010c5295a8ca5c57a2f15a40def7674.tar.gz
bcm5719-llvm-3f2d42baa010c5295a8ca5c57a2f15a40def7674.zip
Fix some errors in <arm_neon.h> tests that cause them to fail with lax
vector conversions disabled. llvm-svn: 374457
-rw-r--r--clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c6
-rw-r--r--clang/test/CodeGen/arm64-vrnd.c14
2 files changed, 10 insertions, 10 deletions
diff --git a/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c b/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
index de1dd4a0597..dc15923a417 100644
--- a/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ b/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -146,14 +146,14 @@ int16x8_t test_vcvtq_s16_f16 (float16x8_t a) {
// CHECK-LABEL: test_vcvt_u16_f16
// CHECK: [[VCVT:%.*]] = fptoui <4 x half> %a to <4 x i16>
// CHECK: ret <4 x i16> [[VCVT]]
-int16x4_t test_vcvt_u16_f16 (float16x4_t a) {
+uint16x4_t test_vcvt_u16_f16 (float16x4_t a) {
return vcvt_u16_f16(a);
}
// CHECK-LABEL: test_vcvtq_u16_f16
// CHECK: [[VCVT:%.*]] = fptoui <8 x half> %a to <8 x i16>
// CHECK: ret <8 x i16> [[VCVT]]
-int16x8_t test_vcvtq_u16_f16 (float16x8_t a) {
+uint16x8_t test_vcvtq_u16_f16 (float16x8_t a) {
return vcvtq_u16_f16(a);
}
@@ -167,7 +167,7 @@ int16x4_t test_vcvta_s16_f16 (float16x4_t a) {
// CHECK-LABEL: test_vcvta_u16_f16
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtau.v4i16.v4f16(<4 x half> %a)
// CHECK: ret <4 x i16> [[VCVT]]
-int16x4_t test_vcvta_u16_f16 (float16x4_t a) {
+uint16x4_t test_vcvta_u16_f16 (float16x4_t a) {
return vcvta_u16_f16(a);
}
diff --git a/clang/test/CodeGen/arm64-vrnd.c b/clang/test/CodeGen/arm64-vrnd.c
index 7729c094a20..c710caedf18 100644
--- a/clang/test/CodeGen/arm64-vrnd.c
+++ b/clang/test/CodeGen/arm64-vrnd.c
@@ -1,22 +1,22 @@
-// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -flax-vector-conversions=none -emit-llvm -o - %s | FileCheck %s
#include <arm_neon.h>
-int64x2_t rnd5(float64x2_t a) { return vrndq_f64(a); }
+float64x2_t rnd5(float64x2_t a) { return vrndq_f64(a); }
// CHECK: call <2 x double> @llvm.trunc.v2f64(<2 x double>
-int64x2_t rnd9(float64x2_t a) { return vrndnq_f64(a); }
+float64x2_t rnd9(float64x2_t a) { return vrndnq_f64(a); }
// CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
-int64x2_t rnd13(float64x2_t a) { return vrndmq_f64(a); }
+float64x2_t rnd13(float64x2_t a) { return vrndmq_f64(a); }
// CHECK: call <2 x double> @llvm.floor.v2f64(<2 x double>
-int64x2_t rnd18(float64x2_t a) { return vrndpq_f64(a); }
+float64x2_t rnd18(float64x2_t a) { return vrndpq_f64(a); }
// CHECK: call <2 x double> @llvm.ceil.v2f64(<2 x double>
-int64x2_t rnd22(float64x2_t a) { return vrndaq_f64(a); }
+float64x2_t rnd22(float64x2_t a) { return vrndaq_f64(a); }
// CHECK: call <2 x double> @llvm.round.v2f64(<2 x double>
-int64x2_t rnd25(float64x2_t a) { return vrndxq_f64(a); }
+float64x2_t rnd25(float64x2_t a) { return vrndxq_f64(a); }
// CHECK: call <2 x double> @llvm.rint.v2f64(<2 x double>
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