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authorDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>2017-04-12 15:36:09 +0000
committerDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>2017-04-12 15:36:09 +0000
commit3bff0c8c595f0cb62a7e09115af19f04cb7e9f7c (patch)
tree70554ea2f57a183c7ff6d8e8973248237eca97a4
parent02a0e91831cea08f10c011da05845cf83e9492dd (diff)
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[AMDGPU][MC] Corrected encoding of V_MQSAD_U32_U8 for CI
Corrected encoding of V_MQSAD_U32_U8 for CI See bug 32552: https://bugs.llvm.org//show_bug.cgi?id=32552 Reviewers: vpykhtin Differential Revision: https://reviews.llvm.org/D31810 llvm-svn: 300070
-rw-r--r--llvm/lib/Target/AMDGPU/VOP3Instructions.td2
-rw-r--r--llvm/test/MC/AMDGPU/vop3.s2
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index 54a8a07822f..c95a2ad7c11 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -402,7 +402,7 @@ multiclass VOP3be_Real_ci<bits<9> op> {
defm V_MQSAD_U16_U8 : VOP3_Real_ci <0x172>;
defm V_QSAD_PK_U16_U8 : VOP3_Real_ci <0x172>;
-defm V_MQSAD_U32_U8 : VOP3_Real_ci <0x174>;
+defm V_MQSAD_U32_U8 : VOP3_Real_ci <0x175>;
defm V_MAD_U64_U32 : VOP3be_Real_ci <0x176>;
defm V_MAD_I64_I32 : VOP3be_Real_ci <0x177>;
diff --git a/llvm/test/MC/AMDGPU/vop3.s b/llvm/test/MC/AMDGPU/vop3.s
index 41ec78ee63f..e8a2c5d3691 100644
--- a/llvm/test/MC/AMDGPU/vop3.s
+++ b/llvm/test/MC/AMDGPU/vop3.s
@@ -386,7 +386,7 @@ v_mad_f32 v9, 0.5, v5, -v8
// VI: v_mad_f32 v9, 0.5, v5, -v8 ; encoding: [0x09,0x00,0xc1,0xd1,0xf0,0x0a,0x22,0x84]
v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3]
-// CI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xe8,0xd2,0x02,0x08,0x02,0x04]
+// CI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xea,0xd2,0x02,0x08,0x02,0x04]
// VI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xe7,0xd1,0x02,0x08,0x02,0x04]
// NOSI: error: instruction not supported on this GPU
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