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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-29 17:42:17 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-29 17:42:17 +0000 |
| commit | 3b764cfd48a9d8600be6b029176d2c75d27ddbe9 (patch) | |
| tree | 97e818f215b7aa2403b7a7571e181e53d5ba2c3f | |
| parent | 1c1d2438aaf16eced4b6cf9ca0065d8d36ed6dbe (diff) | |
| download | bcm5719-llvm-3b764cfd48a9d8600be6b029176d2c75d27ddbe9.tar.gz bcm5719-llvm-3b764cfd48a9d8600be6b029176d2c75d27ddbe9.zip | |
ARM range checking for mode on CPS instruction.
llvm-svn: 136473
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index aa68ae236c7..a98d6f3ec11 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1319,13 +1319,13 @@ class CPS<dag iops, string asm_ops> } let M = 1 in - def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode), + def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, imm0_15:$mode), "$imod\t$iflags, $mode">; let mode = 0, M = 0 in def CPS2p : CPS<(ins imod_op:$imod, iflags_op:$iflags), "$imod\t$iflags">; let imod = 0, iflags = 0, M = 1 in - def CPS1p : CPS<(ins i32imm:$mode), "\t$mode">; + def CPS1p : CPS<(ins imm0_15:$mode), "\t$mode">; // Preload signals the memory system of possible future data/instruction access. // These are for disassembly only. |
