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authorBenjamin Kramer <benny.kra@googlemail.com>2019-07-11 17:44:11 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2019-07-11 17:44:11 +0000
commit3b5e60b695e11c01d218dcdaf63e18c4ba781bcf (patch)
treedc6a9aa34db162a5b9367a5a9bec470ec46a2378
parent83c94bfc0a10d5c9ab679f3bc77b8c1c06685f99 (diff)
downloadbcm5719-llvm-3b5e60b695e11c01d218dcdaf63e18c4ba781bcf.tar.gz
bcm5719-llvm-3b5e60b695e11c01d218dcdaf63e18c4ba781bcf.zip
[CodeGen] NVPTX: Switch from atomic.load.add.f32 to atomicrmw fadd
llvm-svn: 365798
-rw-r--r--clang/lib/CodeGen/CGBuiltin.cpp18
-rw-r--r--clang/test/CodeGen/builtins-nvptx-ptx50.cu2
-rw-r--r--clang/test/CodeGen/builtins-nvptx.c2
3 files changed, 5 insertions, 17 deletions
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 52e2d5bfb91..086785fdbac 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -13472,24 +13472,12 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
// success flag.
return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false);
- case NVPTX::BI__nvvm_atom_add_gen_f: {
- Value *Ptr = EmitScalarExpr(E->getArg(0));
- Value *Val = EmitScalarExpr(E->getArg(1));
- // atomicrmw only deals with integer arguments so we need to use
- // LLVM's nvvm_atomic_load_add_f32 intrinsic for that.
- Function *FnALAF32 =
- CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType());
- return Builder.CreateCall(FnALAF32, {Ptr, Val});
- }
-
+ case NVPTX::BI__nvvm_atom_add_gen_f:
case NVPTX::BI__nvvm_atom_add_gen_d: {
Value *Ptr = EmitScalarExpr(E->getArg(0));
Value *Val = EmitScalarExpr(E->getArg(1));
- // atomicrmw only deals with integer arguments, so we need to use
- // LLVM's nvvm_atomic_load_add_f64 intrinsic.
- Function *FnALAF64 =
- CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f64, Ptr->getType());
- return Builder.CreateCall(FnALAF64, {Ptr, Val});
+ return Builder.CreateAtomicRMW(llvm::AtomicRMWInst::FAdd, Ptr, Val,
+ AtomicOrdering::SequentiallyConsistent);
}
case NVPTX::BI__nvvm_atom_inc_gen_ui: {
diff --git a/clang/test/CodeGen/builtins-nvptx-ptx50.cu b/clang/test/CodeGen/builtins-nvptx-ptx50.cu
index 72e1aecb487..4436ff523cf 100644
--- a/clang/test/CodeGen/builtins-nvptx-ptx50.cu
+++ b/clang/test/CodeGen/builtins-nvptx-ptx50.cu
@@ -17,7 +17,7 @@
// CHECK-LABEL: test_fn
__device__ void test_fn(double d, double* double_ptr) {
- // CHECK: call double @llvm.nvvm.atomic.load.add.f64.p0f64
+ // CHECK: atomicrmw fadd double
// expected-error@+1 {{'__nvvm_atom_add_gen_d' needs target feature sm_60}}
__nvvm_atom_add_gen_d(double_ptr, d);
}
diff --git a/clang/test/CodeGen/builtins-nvptx.c b/clang/test/CodeGen/builtins-nvptx.c
index 16f41bac343..31c3ecdb149 100644
--- a/clang/test/CodeGen/builtins-nvptx.c
+++ b/clang/test/CodeGen/builtins-nvptx.c
@@ -279,7 +279,7 @@ __device__ void nvvm_atom(float *fp, float f, double *dfp, double df, int *ip,
// CHECK-NEXT: extractvalue { i64, i1 } {{%[0-9]+}}, 0
__nvvm_atom_cas_gen_ll(&sll, 0, ll);
- // CHECK: call float @llvm.nvvm.atomic.load.add.f32.p0f32
+ // CHECK: atomicrmw fadd float
__nvvm_atom_add_gen_f(fp, f);
// CHECK: call i32 @llvm.nvvm.atomic.load.inc.32.p0i32
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