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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-04-15 17:51:30 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-04-15 17:51:30 +0000 |
| commit | 3a7beafb328d7362aecea7df38e0247e3c2a5aa9 (patch) | |
| tree | 75a636d23cfdf4814cb52eaa02ffb6f20d17afbe | |
| parent | 9991659fab63430e665d8c7e49ee6e9d74edb413 (diff) | |
| download | bcm5719-llvm-3a7beafb328d7362aecea7df38e0247e3c2a5aa9.tar.gz bcm5719-llvm-3a7beafb328d7362aecea7df38e0247e3c2a5aa9.zip | |
R600/SI: Emit configuration value in the .AMDGPU.config ELF section
llvm-svn: 179545
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/elf.ll | 1 |
2 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp index dacb03325bc..72f98ee0b00 100644 --- a/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp +++ b/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp @@ -21,7 +21,10 @@ #include "AMDGPU.h" #include "SIMachineFunctionInfo.h" #include "SIRegisterInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSectionELF.h" #include "llvm/MC/MCStreamer.h" +#include "llvm/Support/ELF.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Target/TargetLoweringObjectFile.h" @@ -50,10 +53,15 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) { if (OutStreamer.hasRawTextSupport()) { OutStreamer.EmitRawText("@" + MF.getName() + ":"); } - OutStreamer.SwitchSection(getObjFileLowering().getTextSection()); if (STM.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) { + const MCSectionELF *ConfigSection = getObjFileLowering().getContext() + .getELFSection(".AMDGPU.config", + ELF::SHT_NULL, 0, + SectionKind::getReadOnly()); + OutStreamer.SwitchSection(ConfigSection); EmitProgramInfo(MF); } + OutStreamer.SwitchSection(getObjFileLowering().getTextSection()); EmitFunctionBody(); return false; } diff --git a/llvm/test/CodeGen/R600/elf.ll b/llvm/test/CodeGen/R600/elf.ll index 470e4cac0fb..2383148c533 100644 --- a/llvm/test/CodeGen/R600/elf.ll +++ b/llvm/test/CodeGen/R600/elf.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=SI -filetype=obj | llvm-readobj -s - | FileCheck %s ; CHECK: Format: ELF32 +; CHECK: Name: .AMDGPU.config define void @test(i32 %p) { %i = add i32 %p, 2 %r = bitcast i32 %i to float |
