diff options
| author | Jim Grosbach <grosbach@apple.com> | 2012-02-24 00:53:11 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-02-24 00:53:11 +0000 |
| commit | 3a21e2c33eabb834acf0b58c2d065b4b2a2cbf63 (patch) | |
| tree | a6f2165eb9f2232106e3689f64dd54486e264b05 | |
| parent | f2131e7d953ce9cd751a05073c0d46ab1db87419 (diff) | |
| download | bcm5719-llvm-3a21e2c33eabb834acf0b58c2d065b4b2a2cbf63.tar.gz bcm5719-llvm-3a21e2c33eabb834acf0b58c2d065b4b2a2cbf63.zip | |
Make sure the regs are low regs for tMUL size reduction.
llvm-svn: 151318
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp index 776d0eff5e1..5ee5f4202ef 100644 --- a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -599,7 +599,12 @@ Thumb2SizeReduce::ReduceTo2Addr(MachineBasicBlock &MBB, MachineInstr *MI, unsigned Reg1 = MI->getOperand(1).getReg(); // t2MUL is "special". The tied source operand is second, not first. if (MI->getOpcode() == ARM::t2MUL) { - if (Reg0 != MI->getOperand(2).getReg()) { + unsigned Reg2 = MI->getOperand(2).getReg(); + // Early exit if the regs aren't all low regs. + if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1) + || !isARMLowRegister(Reg2)) + return false; + if (Reg0 != Reg2) { // If the other operand also isn't the same as the destination, we // can't reduce. if (Reg1 != Reg0) |
