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authorAnton Korobeynikov <asl@math.spbu.ru>2009-07-18 12:26:13 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-07-18 12:26:13 +0000
commit39f2a224014c3a81731288b458703acf5cc3d43a (patch)
treee433477c15c3bcd8e940870acf747f442501e73e
parentc3b10f067765e477225f09c568907f19fc279b31 (diff)
downloadbcm5719-llvm-39f2a224014c3a81731288b458703acf5cc3d43a.tar.gz
bcm5719-llvm-39f2a224014c3a81731288b458703acf5cc3d43a.zip
Provide expansion for ct* intrinsics
llvm-svn: 76311
-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelLowering.cpp7
-rw-r--r--llvm/lib/Target/SystemZ/SystemZInstrInfo.td12
2 files changed, 19 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 2365d59d22b..b1d42cb18ad 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -106,6 +106,13 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) :
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
+ setOperationAction(ISD::CTPOP, MVT::i32, Expand);
+ setOperationAction(ISD::CTPOP, MVT::i64, Expand);
+ setOperationAction(ISD::CTTZ, MVT::i32, Expand);
+ setOperationAction(ISD::CTTZ, MVT::i64, Expand);
+ setOperationAction(ISD::CTLZ, MVT::i32, Promote);
+ setOperationAction(ISD::CTLZ, MVT::i64, Legal);
+
// FIXME: Can we lower these 2 efficiently?
setOperationAction(ISD::SETCC, MVT::i32, Expand);
setOperationAction(ISD::SETCC, MVT::i64, Expand);
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
index 8985169e6cf..03b644195a9 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -942,6 +942,15 @@ def UCMPZX64rm32 : RXYI<0xE331,
} // Defs = [PSW]
//===----------------------------------------------------------------------===//
+// Other crazy stuff
+let Defs = [PSW] in {
+def FLOGR64 : RREI<0xB983,
+ (outs GR128:$dst), (ins GR64:$src),
+ "flogr\t{$dst, $src}",
+ []>;
+} // Defs = [PSW]
+
+//===----------------------------------------------------------------------===//
// Non-Instruction Patterns.
//===----------------------------------------------------------------------===//
@@ -1003,3 +1012,6 @@ def : Pat<(mulhu GR64:$src1, GR64:$src2),
GR64:$src1, subreg_odd),
GR64:$src2),
subreg_even)>;
+
+def : Pat<(ctlz GR64:$src),
+ (EXTRACT_SUBREG (FLOGR64 GR64:$src), subreg_even)>;
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