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authorSanjay Patel <spatel@rotateright.com>2019-09-16 16:15:25 +0000
committerSanjay Patel <spatel@rotateright.com>2019-09-16 16:15:25 +0000
commit3961a143e13a9cd7fdfec74a9f26e86117618708 (patch)
tree90078434a6591896a5a0ab29503ba1df01f5b2bf
parent4d9d0f9cf532ec40f07178693f1c37049c18bc79 (diff)
downloadbcm5719-llvm-3961a143e13a9cd7fdfec74a9f26e86117618708.tar.gz
bcm5719-llvm-3961a143e13a9cd7fdfec74a9f26e86117618708.zip
[InstCombine] remove unneeded one-use checks for icmp fold
Related folds were added in: rL125734 ...the code comment about register pressure is discussed in more detail in: https://bugs.llvm.org/show_bug.cgi?id=2698 But 10 years later, perf testing bzip2 with this change now shows a slight (0.2% average) improvement on Haswell although that's probably within test noise. Given that this is IR canonicalization, we shouldn't be worried about register pressure though; the backend should be able to adjust for that as needed. This is part of solving PR43310 the theoretically right way: https://bugs.llvm.org/show_bug.cgi?id=43310 ...ie, if we don't cripple basic transforms, then we won't need to add special-case code to detect larger patterns. rL371940 and rL371981 are related patches in this series. llvm-svn: 372007
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp5
-rw-r--r--llvm/test/Transforms/InstCombine/icmp-add.ll7
2 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 5c443faf2f2..e569ae866b5 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -3697,11 +3697,8 @@ Instruction *InstCombiner::foldICmpBinOp(ICmpInst &I) {
C == Op0 ? D : C);
// icmp (A+B), (A+D) -> icmp B, D for equalities or if there is no overflow.
- // TODO: The one-use checks should not be necessary.
if (A && C && (A == C || A == D || B == C || B == D) && NoOp0WrapProblem &&
- NoOp1WrapProblem &&
- // Try not to increase register pressure.
- BO0->hasOneUse() && BO1->hasOneUse()) {
+ NoOp1WrapProblem) {
// Determine Y and Z in the form icmp (X+Y), (X+Z).
Value *Y, *Z;
if (A == C) {
diff --git a/llvm/test/Transforms/InstCombine/icmp-add.ll b/llvm/test/Transforms/InstCombine/icmp-add.ll
index ffbfbabd428..1e3875b112c 100644
--- a/llvm/test/Transforms/InstCombine/icmp-add.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-add.ll
@@ -483,7 +483,7 @@ define i1 @common_op_nsw_extra_uses(i32 %x, i32 %y, i32 %z) {
; CHECK-NEXT: call void @use(i32 [[LHS]])
; CHECK-NEXT: [[RHS:%.*]] = add nsw i32 [[Y:%.*]], [[Z]]
; CHECK-NEXT: call void @use(i32 [[RHS]])
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[LHS]], [[RHS]]
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = add nsw i32 %x, %z
@@ -512,7 +512,7 @@ define i1 @common_op_nuw_extra_uses(i32 %x, i32 %y, i32 %z) {
; CHECK-NEXT: call void @use(i32 [[LHS]])
; CHECK-NEXT: [[RHS:%.*]] = add nuw i32 [[Z]], [[Y:%.*]]
; CHECK-NEXT: call void @use(i32 [[RHS]])
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[LHS]], [[RHS]]
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[C]]
;
%lhs = add nuw i32 %x, %z
@@ -609,8 +609,7 @@ define void @bzip1(i8 %a, i8 %b, i8 %x) {
define void @bzip2(i8 %a, i8 %b, i8 %x) {
; CHECK-LABEL: @bzip2(
; CHECK-NEXT: [[ADD1:%.*]] = add i8 [[A:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[ADD2:%.*]] = add i8 [[B:%.*]], [[X]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[ADD1]], [[ADD2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[B:%.*]]
; CHECK-NEXT: call void @use1(i1 [[CMP]])
; CHECK-NEXT: call void @use8(i8 [[ADD1]])
; CHECK-NEXT: ret void
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