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| author | Bob Wilson <bob.wilson@apple.com> | 2010-02-16 22:01:59 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-02-16 22:01:59 +0000 |
| commit | 37f106e18c67944888f789a2192cb4cd4928417e (patch) | |
| tree | 5dd680301070c9857170015fe963dea2136c0c12 | |
| parent | 4c444bf606e3e463ad8038bf4e70b9ee3cdb2305 (diff) | |
| download | bcm5719-llvm-37f106e18c67944888f789a2192cb4cd4928417e.tar.gz bcm5719-llvm-37f106e18c67944888f789a2192cb4cd4928417e.zip | |
Handle tGPR register class in a few more places. This fixes some llvm-gcc
build failures due to my fix for pr6111.
llvm-svn: 96402
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 7b35a06b945..ae84da8af24 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -704,6 +704,11 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MFI.getObjectSize(FI), Align); + // tGPR is used sometimes in ARM instructions that need to avoid using + // certain registers. Just treat it as GPR here. + if (RC == ARM::tGPRRegisterClass) + RC = ARM::GPRRegisterClass; + if (RC == ARM::GPRRegisterClass) { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::STR)) .addReg(SrcReg, getKillRegState(isKill)) @@ -752,6 +757,11 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MFI.getObjectSize(FI), Align); + // tGPR is used sometimes in ARM instructions that need to avoid using + // certain registers. Just treat it as GPR here. + if (RC == ARM::tGPRRegisterClass) + RC = ARM::GPRRegisterClass; + if (RC == ARM::GPRRegisterClass) { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::LDR), DestReg) .addFrameIndex(FI).addReg(0).addImm(0).addMemOperand(MMO)); |
