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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-07 23:23:52 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-07 23:23:52 +0000 |
| commit | 36d2198dae479831c3592a7bf0e3029343b6ee57 (patch) | |
| tree | 434e256b518993955ffd0de02a3e13a34ef3c05e | |
| parent | 3ca41d4758afa21fe850faf0c035b165a65236b0 (diff) | |
| download | bcm5719-llvm-36d2198dae479831c3592a7bf0e3029343b6ee57.tar.gz bcm5719-llvm-36d2198dae479831c3592a7bf0e3029343b6ee57.zip | |
Add 64-bit HWR29 register.
llvm-svn: 146099
| -rw-r--r-- | llvm/lib/Target/Mips/MipsRegisterInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.td b/llvm/lib/Target/Mips/MipsRegisterInfo.td index 925ad9e70ab..c8cf7f2144c 100644 --- a/llvm/lib/Target/Mips/MipsRegisterInfo.td +++ b/llvm/lib/Target/Mips/MipsRegisterInfo.td @@ -239,6 +239,7 @@ let Namespace = "Mips" in { // Hardware register $29 def HWR29 : Register<"29">; + def HWR29_64 : Register<"29">; } //===----------------------------------------------------------------------===// @@ -301,3 +302,4 @@ def HILO64 : RegisterClass<"Mips", [i64], 64, (add HI64, LO64)> { // Hardware registers def HWRegs : RegisterClass<"Mips", [i32], 32, (add HWR29)>; +def HWRegs64 : RegisterClass<"Mips", [i64], 32, (add HWR29_64)>;
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