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authorCraig Topper <craig.topper@gmail.com>2017-04-10 07:06:44 +0000
committerCraig Topper <craig.topper@gmail.com>2017-04-10 07:06:44 +0000
commit3606e732ddc4dff21a4bace4aaf79a2c50c7e95d (patch)
tree050eaff96acc0d8db6f93eead2c62f54c81d9f56
parent838d13e7ee6168ec31822b8278949cfe6266ac1e (diff)
downloadbcm5719-llvm-3606e732ddc4dff21a4bace4aaf79a2c50c7e95d.tar.gz
bcm5719-llvm-3606e732ddc4dff21a4bace4aaf79a2c50c7e95d.zip
[SelectionDAG] TargetLowering::SimplifyDemandedBits how to properly calculate KnownZero bits for ISD::SETCC and ISD::AssertZExt
Summary: For SETCC we aren't calculating the KnownZero bits at all. I've copied the code from computeKnownZero over for this. For AssertZExt we were only setting KnownZero for bits that were demanded. But the upper bits are zero whether they were demanded or not. I'm interested in fixing this because my belief is the first part of the ISD::AND handling code in SimplifyDemandedBits largely exists because of these two bugs. In that code we go to computeKnownBits for the LHS and optimize a RHS constant. Because computeKnownBits handles SETCC and AssertZExt correctly we get better information sometimes than when we call SimplifyDemandedBits on the LHS later. With these two issues fixed in SimplifyDemandedBits I was able to remove that computeKnownBits call and still pass all X86 tests. I'll submit that change in a separate patch. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31715 llvm-svn: 299839
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index d3ccdcd5ffd..034591a00fe 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -791,6 +791,10 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
// TODO: Should we check for other forms of sign-bit comparisons?
// Examples: X <= -1, X >= 0
}
+ if (getBooleanContents(Op0.getValueType()) ==
+ TargetLowering::ZeroOrOneBooleanContent &&
+ BitWidth > 1)
+ KnownZero.setBitsFrom(1);
break;
}
case ISD::SHL:
@@ -1233,7 +1237,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
return true;
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
- KnownZero |= ~InMask & NewMask;
+ KnownZero |= ~InMask;
break;
}
case ISD::BITCAST:
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