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authorGuillaume Chatelet <gchatelet@google.com>2019-09-18 15:40:20 +0000
committerGuillaume Chatelet <gchatelet@google.com>2019-09-18 15:40:20 +0000
commit35b4b403b441c7105a58fcfe35748ccfd89faf53 (patch)
treebb0b5aae8dd178b9f9004210fdb8cf4b140f286a
parentf124ab9fe11574b11d47397af70555766acf25f9 (diff)
downloadbcm5719-llvm-35b4b403b441c7105a58fcfe35748ccfd89faf53.tar.gz
bcm5719-llvm-35b4b403b441c7105a58fcfe35748ccfd89faf53.zip
[Alignment][NFC] Use Align::None instead of 1
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: sdardis, nemanjai, hiraditya, kbarton, jrtc27, MaskRay, atanasyan, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67704 llvm-svn: 372230
-rw-r--r--llvm/include/llvm/CodeGen/AsmPrinter.h2
-rw-r--r--llvm/include/llvm/CodeGen/TargetLowering.h2
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineFrameInfo.cpp8
-rw-r--r--llvm/lib/Target/Mips/MipsConstantIslandPass.cpp2
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp8
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
7 files changed, 15 insertions, 15 deletions
diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h
index a06051f5bf6..576854d806a 100644
--- a/llvm/include/llvm/CodeGen/AsmPrinter.h
+++ b/llvm/include/llvm/CodeGen/AsmPrinter.h
@@ -636,7 +636,7 @@ public:
/// Return the alignment for the specified \p GV.
static llvm::Align getGVAlignment(const GlobalValue *GV, const DataLayout &DL,
- llvm::Align InAlign = llvm::Align(1));
+ llvm::Align InAlign = llvm::Align::None());
private:
/// Private state for PrintSpecial()
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index cf90f3e5c6a..608692fcb57 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -838,7 +838,7 @@ public:
int offset = 0; // offset off of ptrVal
unsigned size = 0; // the size of the memory location
// (taken from memVT if zero)
- MaybeAlign align = Align(1); // alignment
+ MaybeAlign align = Align::None(); // alignment
MachineMemOperand::Flags flags = MachineMemOperand::MONone;
IntrinsicInfo() = default;
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 20c50bb8a2a..4ea312a430c 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2904,7 +2904,7 @@ void AsmPrinter::EmitBasicBlockStart(const MachineBasicBlock &MBB) {
// Emit an alignment directive for this block, if needed.
const llvm::Align Align = MBB.getAlignment();
- if (Align > 1)
+ if (Align != llvm::Align::None())
EmitAlignment(Align);
MCCodePaddingContext Context;
setupCodePaddingContext(MBB, Context);
diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp
index e045e4ed414..de146184105 100644
--- a/llvm/lib/CodeGen/MachineFrameInfo.cpp
+++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp
@@ -89,8 +89,8 @@ int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
// object is 16-byte aligned. Note that unlike the non-fixed case, if the
// stack needs realignment, we can't assume that the stack will in fact be
// aligned.
- llvm::Align Alignment =
- commonAlignment(ForcedRealign ? llvm::Align() : StackAlignment, SPOffset);
+ llvm::Align Alignment = commonAlignment(
+ ForcedRealign ? llvm::Align::None() : StackAlignment, SPOffset);
Alignment = clampStackAlignment(!StackRealignable, Alignment, StackAlignment);
Objects.insert(Objects.begin(),
StackObject(Size, Alignment, SPOffset, IsImmutable,
@@ -102,8 +102,8 @@ int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
int MachineFrameInfo::CreateFixedSpillStackObject(uint64_t Size,
int64_t SPOffset,
bool IsImmutable) {
- llvm::Align Alignment =
- commonAlignment(ForcedRealign ? llvm::Align() : StackAlignment, SPOffset);
+ llvm::Align Alignment = commonAlignment(
+ ForcedRealign ? llvm::Align::None() : StackAlignment, SPOffset);
Alignment = clampStackAlignment(!StackRealignable, Alignment, StackAlignment);
Objects.insert(Objects.begin(),
StackObject(Size, Alignment, SPOffset, IsImmutable,
diff --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
index cf748dcd7a2..053f3963b1e 100644
--- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
+++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
@@ -948,7 +948,7 @@ bool MipsConstantIslands::isWaterInRange(unsigned UserOffset,
MachineFunction::const_iterator NextBlock = ++Water->getIterator();
if (NextBlock == MF->end()) {
NextBlockOffset = BBInfo[Water->getNumber()].postOffset();
- NextBlockAlignment = llvm::Align();
+ NextBlockAlignment = llvm::Align::None();
} else {
NextBlockOffset = BBInfo[NextBlock->getNumber()].Offset;
NextBlockAlignment = NextBlock->getAlignment();
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index e68012cee40..4c846e6e753 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -14627,7 +14627,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
Info.ptrVal = I.getArgOperand(0);
Info.offset = -VT.getStoreSize()+1;
Info.size = 2*VT.getStoreSize()-1;
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags = MachineMemOperand::MOLoad;
return true;
}
@@ -14661,7 +14661,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
Info.ptrVal = I.getArgOperand(0);
Info.offset = 0;
Info.size = VT.getStoreSize();
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags = MachineMemOperand::MOLoad;
return true;
}
@@ -14713,7 +14713,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
Info.ptrVal = I.getArgOperand(1);
Info.offset = -VT.getStoreSize()+1;
Info.size = 2*VT.getStoreSize()-1;
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags = MachineMemOperand::MOStore;
return true;
}
@@ -14746,7 +14746,7 @@ bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
Info.ptrVal = I.getArgOperand(1);
Info.offset = 0;
Info.size = VT.getStoreSize();
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags = MachineMemOperand::MOStore;
return true;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 7103b703912..6867d765447 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4862,7 +4862,7 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
ScalarVT = MVT::i32;
Info.memVT = MVT::getVectorVT(ScalarVT, VT.getVectorNumElements());
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags |= MachineMemOperand::MOStore;
break;
}
@@ -4875,7 +4875,7 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
unsigned NumElts = std::min(DataVT.getVectorNumElements(),
IndexVT.getVectorNumElements());
Info.memVT = MVT::getVectorVT(DataVT.getVectorElementType(), NumElts);
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags |= MachineMemOperand::MOLoad;
break;
}
@@ -4887,7 +4887,7 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
unsigned NumElts = std::min(DataVT.getVectorNumElements(),
IndexVT.getVectorNumElements());
Info.memVT = MVT::getVectorVT(DataVT.getVectorElementType(), NumElts);
- Info.align = Align(1);
+ Info.align = Align::None();
Info.flags |= MachineMemOperand::MOStore;
break;
}
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