Revert "Refactor UpdatePredRedefs and StepForward to avoid duplication. NFC"

This reverts commit 963cdbccf6e5578822836fd9b2ebece0ba9a60b7 (ie r236514)

This is to get the bots green while i investigate.

llvm-svn: 236518

3 files changed, 33 insertions, 36 deletions

diff --git a/llvm/include/llvm/CodeGen/LivePhysRegs.h b/llvm/include/llvm/CodeGen/LivePhysRegs.h
index 6ffd3eeea35..f44d627d717 100644
--- a/llvm/include/llvm/CodeGen/LivePhysRegs.h
+++ b/llvm/include/llvm/CodeGen/LivePhysRegs.h
@@ -93,8 +93,7 @@ public:
   }
 
   /// \brief Removes physical registers clobbered by the regmask operand @p MO.
-  void removeRegsInMask(const MachineOperand &MO,
-        SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers);
+  void removeRegsInMask(const MachineOperand &MO);
 
   /// \brief Returns true if register @p Reg is contained in the set. This also
   /// works if only the super register of @p Reg has been defined, because we
@@ -110,11 +109,7 @@ public:
   /// instruction(bundle): Remove killed-uses, add defs. This is the not
   /// recommended way, because it depends on accurate kill flags. If possible
   /// use stepBackwards() instead of this function.
-  /// The clobbers set will be the list of registers either defined or clobbered
-  /// by a regmask.  The operand will identify whether this is a regmask or
-  /// register operand.
-  void stepForward(const MachineInstr &MI,
-        SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers);
+  void stepForward(const MachineInstr &MI);
 
   /// \brief Adds all live-in registers of basic block @p MBB.
   void addLiveIns(const MachineBasicBlock *MBB) {
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 938c9cf6039..b8799a563fc 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -975,18 +975,26 @@ void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
 /// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
 /// values defined in MI which are not live/used by MI.
 static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
-  SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
-  Redefs.stepForward(*MI, Clobbers);
-
-  // Now add the implicit uses for each of the clobbered values.
-  for (auto Reg : Clobbers) {
-    const MachineOperand &Op = *Reg.second;
-    // FIXME: Const cast here is nasty, but better than making StepForward
-    // take a mutable instruction instead of const.
-    MachineInstr *OpMI = const_cast<MachineInstr*>(Op.getParent());
-    MachineInstrBuilder MIB(*OpMI->getParent()->getParent(), OpMI);
-    assert(Op.isReg() && "Register operand required");
-    MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
+  for (ConstMIBundleOperands Ops(MI); Ops.isValid(); ++Ops) {
+    if (!Ops->isReg() || !Ops->isKill())
+      continue;
+    unsigned Reg = Ops->getReg();
+    if (Reg == 0)
+      continue;
+    Redefs.removeReg(Reg);
+  }
+  for (MIBundleOperands Ops(MI); Ops.isValid(); ++Ops) {
+    if (!Ops->isReg() || !Ops->isDef())
+      continue;
+    unsigned Reg = Ops->getReg();
+    if (Reg == 0 || Redefs.contains(Reg))
+      continue;
+    Redefs.addReg(Reg);
+
+    MachineOperand &Op = *Ops;
+    MachineInstr *MI = Op.getParent();
+    MachineInstrBuilder MIB(*MI->getParent()->getParent(), MI);
+    MIB.addReg(Reg, RegState::Implicit | RegState::Undef);
   }
 }
 
@@ -1366,8 +1374,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
 
   for (MachineBasicBlock::const_iterator I = BBI1->BB->begin(), E = DI1; I != E;
        ++I) {
-    SmallVector<std::pair<unsigned, const MachineOperand*>, 4> IgnoredClobbers;
-    Redefs.stepForward(*I, IgnoredClobbers);
+    Redefs.stepForward(*I);
   }
   BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
   BBI2->BB->erase(BBI2->BB->begin(), DI2);
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index b6369275051..89567eff517 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -22,17 +22,12 @@ using namespace llvm;
 
 /// \brief Remove all registers from the set that get clobbered by the register
 /// mask.
-/// The clobbers set will be the list of live registers clobbered
-/// by the regmask.
-void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
-        SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
+void LivePhysRegs::removeRegsInMask(const MachineOperand &MO) {
   SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
   while (LRI != LiveRegs.end()) {
-    if (MO.clobbersPhysReg(*LRI)) {
-      if (Clobbers)
-        Clobbers->push_back(std::make_pair(*LRI, &MO));
+    if (MO.clobbersPhysReg(*LRI))
       LRI = LiveRegs.erase(LRI);
-    } else
+    else
       ++LRI;
   }
 }
@@ -50,7 +45,7 @@ void LivePhysRegs::stepBackward(const MachineInstr &MI) {
         continue;
       removeReg(Reg);
     } else if (O->isRegMask())
-      removeRegsInMask(*O, nullptr);
+      removeRegsInMask(*O);
   }
 
   // Add uses to the set.
@@ -68,8 +63,8 @@ void LivePhysRegs::stepBackward(const MachineInstr &MI) {
 /// killed-uses, add defs. This is the not recommended way, because it depends
 /// on accurate kill flags. If possible use stepBackwards() instead of this
 /// function.
-void LivePhysRegs::stepForward(const MachineInstr &MI,
-        SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
+void LivePhysRegs::stepForward(const MachineInstr &MI) {
+  SmallVector<unsigned, 4> Defs;
   // Remove killed registers from the set.
   for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
     if (O->isReg()) {
@@ -78,7 +73,7 @@ void LivePhysRegs::stepForward(const MachineInstr &MI,
         continue;
       if (O->isDef()) {
         if (!O->isDead())
-          Clobbers.push_back(std::make_pair(Reg, &*O));
+          Defs.push_back(Reg);
       } else {
         if (!O->isKill())
           continue;
@@ -86,12 +81,12 @@ void LivePhysRegs::stepForward(const MachineInstr &MI,
         removeReg(Reg);
       }
     } else if (O->isRegMask())
-      removeRegsInMask(*O, &Clobbers);
+      removeRegsInMask(*O);
   }
 
   // Add defs to the set.
-  for (auto Reg : Clobbers)
-    addReg(Reg.first);
+  for (unsigned i = 0, e = Defs.size(); i != e; ++i)
+    addReg(Defs[i]);
 }
 
 /// Prin the currently live registers to OS.