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| author | Owen Anderson <resistor@mac.com> | 2010-11-19 13:11:50 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2010-11-19 13:11:50 +0000 |
| commit | 336021f758cebb1b6d0ab0e53350fd25e78ac893 (patch) | |
| tree | 0ab702cda55b73e922e9fd1921006bccb6ee8202 | |
| parent | c77ebcc9a5d186bc4dc06093becce1276275176b (diff) | |
| download | bcm5719-llvm-336021f758cebb1b6d0ab0e53350fd25e78ac893.tar.gz bcm5719-llvm-336021f758cebb1b6d0ab0e53350fd25e78ac893.zip | |
Fix decoding ambiguities of stdrex and ldrex.
llvm-svn: 119801
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index ca8e7de2665..129481d3bdd 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -2754,10 +2754,8 @@ class T2I_ldrex<bits<2> opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz, bits<4> Rn; bits<4> Rt; - bits<8> imm; let Inst{19-16} = Rn{3-0}; let Inst{15-12} = Rt{3-0}; - let Inst{7-0} = imm{7-0}; } class T2I_strex<bits<2> opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz, InstrItinClass itin, string opc, string asm, string cstr, @@ -2772,11 +2770,9 @@ class T2I_strex<bits<2> opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz, bits<4> Rd; bits<4> Rn; bits<4> Rt; - bits<8> imm; let Inst{11-8} = Rd{3-0}; let Inst{19-16} = Rn{3-0}; let Inst{15-12} = Rt{3-0}; - let Inst{7-0} = imm{7-0}; } let mayLoad = 1 in { |
