Use object file specific section type for initial text section

llvm-svn: 179494

20 files changed, 3 insertions, 30 deletions

diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index 35613b411c2..b35a9de1fc1 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -131,12 +131,7 @@ public:
   }
 
   virtual void InitToTextSection() {
-    // FIXME, this is MachO specific, but the testsuite
-    // expects this.
-    SwitchSection(getContext().getMachOSection(
-                                      "__TEXT", "__text",
-                                      MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
-                                      0, SectionKind::getText()));
+    SwitchSection(getContext().getObjectFileInfo()->getTextSection());
   }
 
   virtual void EmitLabel(MCSymbol *Symbol);
diff --git a/llvm/lib/MC/MCPureStreamer.cpp b/llvm/lib/MC/MCPureStreamer.cpp
index 0e04c5537ac..c9779e037ed 100644
--- a/llvm/lib/MC/MCPureStreamer.cpp
+++ b/llvm/lib/MC/MCPureStreamer.cpp
@@ -12,9 +12,8 @@
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCObjectFileInfo.h"
 #include "llvm/MC/MCObjectStreamer.h"
-// FIXME: Remove this.
-#include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/Support/ErrorHandling.h"
 
@@ -113,10 +112,7 @@ void MCPureStreamer::InitSections() {
 }
 
 void MCPureStreamer::InitToTextSection() {
-  // FIMXE: To what!?
-  SwitchSection(getContext().getMachOSection("__TEXT", "__text",
-                                    MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
-                                    0, SectionKind::getText()));
+  SwitchSection(getContext().getObjectFileInfo()->getTextSection());
 }
 
 void MCPureStreamer::EmitLabel(MCSymbol *Symbol) {
diff --git a/llvm/test/MC/Disassembler/Mips/mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32.txt
index 70224860bc7..ef8bf71bd3a 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s
-# CHECK: .section        __TEXT,__text,regular,pure_instructions
 # CHECK: abs.d $f12, $f14
 0x46 0x20 0x73 0x05
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32_le.txt b/llvm/test/MC/Disassembler/Mips/mips32_le.txt
index 48fa8e2c7fa..a0885a4bfe8 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32_le.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s
-# CHECK: .section        __TEXT,__text,regular,pure_instructions
 # CHECK: abs.d $f12, $f14
 0x05 0x73 0x20 0x46
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2.txt
index 3b70db3bc29..991eaa6cc97 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
-# CHECK: .section        __TEXT,__text,regular,pure_instructions
 # CHECK: abs.d $f12, $f14
 0x46 0x20 0x73 0x05
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt b/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
index ecfde7a39c4..10c293821c9 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s
-# CHECK: .section        __TEXT,__text,regular,pure_instructions
 # CHECK: abs.d $f12, $f14
 0x05 0x73 0x20 0x46
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64.txt b/llvm/test/MC/Disassembler/Mips/mips64.txt
index 38b13776612..b88747370b6 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux | FileCheck %s
-# CHECK: .section	 __TEXT,__text,regular,pure_instructions
 # CHECK: daddiu $11, $26, 31949
 0x67 0x4b 0x7c 0xcd
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64_le.txt b/llvm/test/MC/Disassembler/Mips/mips64_le.txt
index a7ef0e473bb..ddc3c2b60be 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64_le.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux | FileCheck %s
-# CHECK: .section	 __TEXT,__text,regular,pure_instructions
 # CHECK: daddiu $11, $26, 31949
 0xcd 0x7c 0x4b 0x67
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2.txt b/llvm/test/MC/Disassembler/Mips/mips64r2.txt
index 0b421fc551e..cee6f3c21f7 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r2.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2 | FileCheck %s
-# CHECK: .section	 __TEXT,__text,regular,pure_instructions
 # CHECK: daddiu $11, $26, 31949
 0x67 0x4b 0x7c 0xcd
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2_le.txt b/llvm/test/MC/Disassembler/Mips/mips64r2_le.txt
index c1d326f6d67..82e4d6ae1ce 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r2_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r2_le.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2 | FileCheck %s
-# CHECK: .section	 __TEXT,__text,regular,pure_instructions
 # CHECK: daddiu $11, $26, 31949
 0xcd 0x7c 0x4b 0x67
 
diff --git a/llvm/test/MC/Disassembler/XCore/xcore.txt b/llvm/test/MC/Disassembler/XCore/xcore.txt
index 99e54e9857c..d509aff7d38 100644
--- a/llvm/test/MC/Disassembler/XCore/xcore.txt
+++ b/llvm/test/MC/Disassembler/XCore/xcore.txt
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s
-# CHECK: .section        __TEXT,__text,regular,pure_instructions
 
 # 0r instructions
 
diff --git a/llvm/test/MC/Mips/mips-alu-instructions.s b/llvm/test/MC/Mips/mips-alu-instructions.s
index 7384d19e440..586e88bc481 100644
--- a/llvm/test/MC/Mips/mips-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips-alu-instructions.s
@@ -1,7 +1,6 @@
 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for arithmetic and logical instructions.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 #------------------------------------------------------------------------------
 # Logical instructions
 #------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Mips/mips-expansions.s b/llvm/test/MC/Mips/mips-expansions.s
index 3385fe19309..1622965a413 100644
--- a/llvm/test/MC/Mips/mips-expansions.s
+++ b/llvm/test/MC/Mips/mips-expansions.s
@@ -1,7 +1,6 @@
 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for macro instructions
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 #------------------------------------------------------------------------------
 # Load immediate instructions
 #------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Mips/mips-fpu-instructions.s b/llvm/test/MC/Mips/mips-fpu-instructions.s
index a126c6f7188..29dc471db10 100644
--- a/llvm/test/MC/Mips/mips-fpu-instructions.s
+++ b/llvm/test/MC/Mips/mips-fpu-instructions.s
@@ -1,7 +1,6 @@
 # RUN: llvm-mc  %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for FPU instructions.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 #------------------------------------------------------------------------------
 # FP aritmetic  instructions
 #------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Mips/mips-jump-instructions.s b/llvm/test/MC/Mips/mips-jump-instructions.s
index 1dcb287738c..3643c27bbbd 100644
--- a/llvm/test/MC/Mips/mips-jump-instructions.s
+++ b/llvm/test/MC/Mips/mips-jump-instructions.s
@@ -2,7 +2,6 @@
 # RUN: FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for jumps and branches.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 #------------------------------------------------------------------------------
 # Branch instructions
 #------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Mips/mips-memory-instructions.s b/llvm/test/MC/Mips/mips-memory-instructions.s
index b5f1267ef38..c8b055906eb 100644
--- a/llvm/test/MC/Mips/mips-memory-instructions.s
+++ b/llvm/test/MC/Mips/mips-memory-instructions.s
@@ -1,7 +1,6 @@
 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for loads and stores.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 #------------------------------------------------------------------------------
 # Memory store instructions
 #------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Mips/mips-relocations.s b/llvm/test/MC/Mips/mips-relocations.s
index ff71c7559cd..6f095d1ecdf 100644
--- a/llvm/test/MC/Mips/mips-relocations.s
+++ b/llvm/test/MC/Mips/mips-relocations.s
@@ -1,7 +1,6 @@
 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for relocations.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 # CHECK:  lui   $2, %hi(_gp_disp)     # encoding: [A,A,0x02,0x3c]
 # CHECK:                              #   fixup A - offset: 0, value: _gp_disp@ABS_HI, kind: fixup_Mips_HI16
 # CHECK:  addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24]
diff --git a/llvm/test/MC/Mips/mips64-alu-instructions.s b/llvm/test/MC/Mips/mips64-alu-instructions.s
index 1b4ebdfbbd4..04583f9ce64 100644
--- a/llvm/test/MC/Mips/mips64-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips64-alu-instructions.s
@@ -1,7 +1,6 @@
 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for arithmetic and logical instructions.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
 #------------------------------------------------------------------------------
 # Logical instructions
 #------------------------------------------------------------------------------
diff --git a/llvm/test/MC/Mips/nabi-regs.s b/llvm/test/MC/Mips/nabi-regs.s
index 9371208a2a9..050fb813488 100644
--- a/llvm/test/MC/Mips/nabi-regs.s
+++ b/llvm/test/MC/Mips/nabi-regs.s
@@ -8,7 +8,6 @@
 # RUN: -mcpu=mips64r2 -arch=mips64 | \
 # RUN: FileCheck %s
 
-# CHECK: .section    __TEXT,__text,regular,pure_instructions
     .text
 foo:
 
diff --git a/llvm/test/MC/Mips/set-at-directive.s b/llvm/test/MC/Mips/set-at-directive.s
index 98a3a35b542..828175a223a 100644
--- a/llvm/test/MC/Mips/set-at-directive.s
+++ b/llvm/test/MC/Mips/set-at-directive.s
@@ -3,7 +3,6 @@
 # Check that the assembler can handle the documented syntax
 # for ".set at" and set the correct value.
 
-# CHECK: .section __TEXT,__text,regular,pure_instructions
     .text
 foo:
 # CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]