[X86] Commit some comments that weren't in the medium code model patch

llvm-svn: 335298

1 files changed, 4 insertions, 4 deletions

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 604cad3abc6..712276604ae 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -12721,8 +12721,8 @@ namespace {
         static_cast<const X86TargetMachine *>(&MF.getTarget());
       const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
 
-      // Don't do anything if this is 64-bit as 64-bit PIC
-      // uses RIP relative addressing.
+      // Don't do anything in the 64-bit small and kernel code models. They use
+      // RIP-relative addressing for everything.
       if (STI.is64Bit() && (TM->getCodeModel() == CodeModel::Small ||
                             TM->getCodeModel() == CodeModel::Kernel))
         return false;
@@ -12753,6 +12753,8 @@ namespace {
 
       if (STI.is64Bit()) {
         if (TM->getCodeModel() == CodeModel::Medium) {
+          // In the medium code model, use a RIP-relative LEA to materialize the
+          // GOT.
           BuildMI(FirstMBB, MBBI, DL, TII->get(X86::LEA64r), PC)
               .addReg(X86::RIP)
               .addImm(0)
@@ -12762,8 +12764,6 @@ namespace {
         } else if (TM->getCodeModel() == CodeModel::Large) {
           // Loading the GOT in the large code model requires math with labels,
           // so we use a pseudo instruction and expand it during MC emission.
-          // FIXME: Are we using the right register state for a scratch register
-          // that doesn't conflict with the destination?
           unsigned Scratch = RegInfo.createVirtualRegister(&X86::GR64RegClass);
           BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVGOT64r), PC)
               .addReg(Scratch, RegState::Undef | RegState::Define)