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| author | Jim Grosbach <grosbach@apple.com> | 2011-11-16 19:12:24 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-16 19:12:24 +0000 |
| commit | 3127ab6d8f80f1be53ea21f754208b12b24a1c8c (patch) | |
| tree | 7eaf63f4ba33f4a44889c38c099fea99ebc02c12 | |
| parent | 80f7867b5185da6938699113dd91335266796791 (diff) | |
| download | bcm5719-llvm-3127ab6d8f80f1be53ea21f754208b12b24a1c8c.tar.gz bcm5719-llvm-3127ab6d8f80f1be53ea21f754208b12b24a1c8c.zip | |
ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.
llvm-svn: 144814
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 1aa8af7e5b0..48e625cf046 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -5038,6 +5038,18 @@ def : ARMInstAlias<"lsl${s}${p} $Rm, $imm", (LSLi GPR:$Rm, GPR:$Rm, imm0_31:$imm, pred:$p, cc_out:$s)>; def : ARMInstAlias<"ror${s}${p} $Rm, $imm", (RORi GPR:$Rm, GPR:$Rm, imm0_31:$imm, pred:$p, cc_out:$s)>; +def : ARMInstAlias<"asr${s}${p} $Rn, $Rm", + (ASRr GPRnopc:$Rn, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, + cc_out:$s)>; +def : ARMInstAlias<"lsr${s}${p} $Rn, $Rm", + (LSRr GPRnopc:$Rn, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, + cc_out:$s)>; +def : ARMInstAlias<"lsl${s}${p} $Rn, $Rm", + (LSLr GPRnopc:$Rn, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, + cc_out:$s)>; +def : ARMInstAlias<"ror${s}${p} $Rn, $Rm", + (RORr GPRnopc:$Rn, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, + cc_out:$s)>; // 'mul' instruction can be specified with only two operands. |
