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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2018-10-23 18:27:10 +0000 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2018-10-23 18:27:10 +0000 |
| commit | 2fae98579362fe639523aaa541efa10f0c52d916 (patch) | |
| tree | ad00fba036e1b67701ee760afa75fbff73971e2d | |
| parent | b2cf0063d0d0cfc60803ac878c7015403bcc973a (diff) | |
| download | bcm5719-llvm-2fae98579362fe639523aaa541efa10f0c52d916.tar.gz bcm5719-llvm-2fae98579362fe639523aaa541efa10f0c52d916.zip | |
X86DAGToDAGISel::matchBitExtract(): lambdas can't have default arguments.
As reported by ctopper.
That is a gcc-only warning at the moment.
llvm-svn: 345065
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 73abdd80dc6..4b803c5a81b 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -2709,10 +2709,12 @@ bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) { // If we have BMI2's BZHI, we are ok with muti-use patterns. // Else, if we only have BMI1's BEXTR, we require one-use. const bool CanHaveExtraUses = Subtarget->hasBMI2(); - auto checkOneUse = [CanHaveExtraUses](SDValue Op, unsigned NUses = 1) { + auto checkUses = [CanHaveExtraUses](SDValue Op, unsigned NUses) { return CanHaveExtraUses || Op.getNode()->hasNUsesOfValue(NUses, Op.getResNo()); }; + auto checkOneUse = [checkUses](SDValue Op) { return checkUses(Op, 1); }; + auto checkTwoUse = [checkUses](SDValue Op) { return checkUses(Op, 2); }; // a) x & ((1 << nbits) + (-1)) auto matchPatternA = [&checkOneUse, &NBits](SDValue Mask) -> bool { @@ -2750,7 +2752,8 @@ bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) { SDValue X; // d) x << (32 - y) >> (32 - y) - auto matchPatternD = [&checkOneUse, Size, &X, &NBits](SDNode *Node) -> bool { + auto matchPatternD = [&checkOneUse, &checkTwoUse, Size, &X, + &NBits](SDNode *Node) -> bool { if (Node->getOpcode() != ISD::SRL) return false; SDValue N0 = Node->getOperand(0); @@ -2760,7 +2763,7 @@ bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) { SDValue N01 = N0->getOperand(1); // Both of the shifts must be by the exact same value. // There should not be any uses of the shift amount outside of the pattern. - if (N1 != N01 || !checkOneUse(N1, 2)) + if (N1 != N01 || !checkTwoUse(N1)) return false; // Skip over a truncate of the shift amount. if (N1->getOpcode() == ISD::TRUNCATE) { |

