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authorTim Corringham <tcorring@amd.com>2018-12-10 16:23:30 +0000
committerTim Corringham <tcorring@amd.com>2018-12-10 16:23:30 +0000
commit2faadb15f4c682d023738ca3d3a3b75489ee19df (patch)
treee30964f9e08264493c78e0330eb8abea82f34381
parent7ea7de55eaaa827eec2ccfd01701e2ab31bc3c2b (diff)
downloadbcm5719-llvm-2faadb15f4c682d023738ca3d3a3b75489ee19df.tar.gz
bcm5719-llvm-2faadb15f4c682d023738ca3d3a3b75489ee19df.zip
[AMDGPU] Add new Mode Register pass - minor fix
Trivial change to add parentheses to an expression to avoid a sanitizer error in SIModeRegister.cpp, which was committed earlier. llvm-svn: 348767
-rw-r--r--llvm/lib/Target/AMDGPU/SIModeRegister.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIModeRegister.cpp b/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
index c4cad95aaf7..883fd308f2f 100644
--- a/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
+++ b/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
@@ -202,7 +202,7 @@ void SIModeRegister::insertSetreg(MachineBasicBlock &MBB, MachineInstr *MI,
(Offset << AMDGPU::Hwreg::OFFSET_SHIFT_) |
(AMDGPU::Hwreg::ID_MODE << AMDGPU::Hwreg::ID_SHIFT_));
++NumSetregInserted;
- InstrMode.Mask &= ~((1 << Width) - 1) << Offset;
+ InstrMode.Mask &= ~(((1 << Width) - 1) << Offset);
}
}
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