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| author | Craig Topper <craig.topper@intel.com> | 2017-08-17 02:34:35 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-17 02:34:35 +0000 |
| commit | 2f9743d2eaafdf7a4e56bd833e029a54354168e9 (patch) | |
| tree | a328af61ed7a8ee51f43e59ac33bd2b5d4a1aa5d | |
| parent | 5357526ce892ec38b3cd5a313bbe102b00bcd77b (diff) | |
| download | bcm5719-llvm-2f9743d2eaafdf7a4e56bd833e029a54354168e9.tar.gz bcm5719-llvm-2f9743d2eaafdf7a4e56bd833e029a54354168e9.zip | |
[X86] Exchange the memory op predicate for PALIGNR/VPALIGNR. I accidentally swapped them.
llvm-svn: 311060
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 8f746aa507c..60cd226bd21 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -5520,13 +5520,13 @@ multiclass ssse3_palignr<string asm, ValueType VT, RegisterClass RC, } let Predicates = [HasAVX, NoVLX_Or_NoBWI] in - defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, memopv2i64, + defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, loadv2i64, i128mem, 0>, VEX_4V, VEX_WIG; let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in defm VPALIGNRY : ssse3_palignr<"vpalignr", v32i8, VR256, loadv4i64, i256mem, 0>, VEX_4V, VEX_L, VEX_WIG; let Constraints = "$src1 = $dst", Predicates = [UseSSSE3] in - defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, loadv2i64, + defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, memopv2i64, i128mem>; //===---------------------------------------------------------------------===// |
