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| author | Craig Topper <craig.topper@intel.com> | 2019-08-03 23:09:13 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-08-03 23:09:13 +0000 |
| commit | 2edeb8a11a0a324f627b8622066b6997e057bd63 (patch) | |
| tree | 4c5bc6b309ac860e70ddca69900c2cdec7f02cb1 | |
| parent | fe37499207031f5ca9c276460651871ce7a97ddd (diff) | |
| download | bcm5719-llvm-2edeb8a11a0a324f627b8622066b6997e057bd63.tar.gz bcm5719-llvm-2edeb8a11a0a324f627b8622066b6997e057bd63.zip | |
[DAGCombiner] Prevent the combine added in r367710 from creating illegal types after type legalization.
This is further fix for PR42880.
Sanjay already disabled the X86 TLI hook for non-simple types,
but we should really call isTypeLegal here if we're after type
legalization.
llvm-svn: 367768
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 656334b3dba..f6b021c8fd1 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -7631,7 +7631,7 @@ SDValue DAGCombiner::visitSRA(SDNode *N) { EVT TruncVT = EVT::getIntegerVT(Ctx, OpSizeInBits - ShiftAmt); if (VT.isVector()) TruncVT = EVT::getVectorVT(Ctx, TruncVT, VT.getVectorNumElements()); - if (TLI.isTruncateFree(VT, TruncVT)) { + if (isTypeLegal(TruncVT) && TLI.isTruncateFree(VT, TruncVT)) { SDLoc DL(N); SDValue Trunc = DAG.getZExtOrTrunc(Shl.getOperand(0), DL, TruncVT); SDValue ShiftC = DAG.getConstant(AddC->getAPIntValue().lshr(ShiftAmt). |
