diff options
author | Nico Weber <nicolasweber@gmx.de> | 2019-09-22 13:17:38 +0000 |
---|---|---|
committer | Nico Weber <nicolasweber@gmx.de> | 2019-09-22 13:17:38 +0000 |
commit | 2e8d5d73992c3eece02b6a6a5f45b42df2ac65d0 (patch) | |
tree | 8423df0da651ffc7a7ceb13a7aee1a521dff9dca | |
parent | a75b947014ad3f38da7195aa7e2e7adb8e7e4bde (diff) | |
download | bcm5719-llvm-2e8d5d73992c3eece02b6a6a5f45b42df2ac65d0.tar.gz bcm5719-llvm-2e8d5d73992c3eece02b6a6a5f45b42df2ac65d0.zip |
gn build: Add build files for llvm/lib/Target/AVR
Differential Revision: https://reviews.llvm.org/D67872
llvm-svn: 372505
7 files changed, 185 insertions, 1 deletions
diff --git a/llvm/utils/gn/TODO.txt b/llvm/utils/gn/TODO.txt index ebf601e8d25..2b35b4b809c 100644 --- a/llvm/utils/gn/TODO.txt +++ b/llvm/utils/gn/TODO.txt @@ -4,7 +4,7 @@ Ideas for things to do: - once there are more projects, have an llvm_enable_projects arg, modeled after llvm_targets_to_build in the GN build - a check-all build target that runs test of all projects -- more targets (ARC AVR MSP430 XCore) +- more targets (ARC MSP430 XCore) - example: https://reviews.llvm.org/D56416 - investigate feasibility of working `gn check` diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/AsmParser/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/AsmParser/BUILD.gn new file mode 100644 index 00000000000..6a99c37c01a --- /dev/null +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/AsmParser/BUILD.gn @@ -0,0 +1,23 @@ +import("//llvm/utils/TableGen/tablegen.gni") + +tablegen("AVRGenAsmMatcher") { + visibility = [ ":AsmParser" ] + args = [ "-gen-asm-matcher" ] + td_file = "../AVR.td" +} + +static_library("AsmParser") { + output_name = "LLVMAVRAsmParser" + deps = [ + ":AVRGenAsmMatcher", + "//llvm/lib/MC", + "//llvm/lib/MC/MCParser", + "//llvm/lib/Support", + "//llvm/lib/Target/AVR/MCTargetDesc", + "//llvm/lib/Target/AVR/TargetInfo", + ] + include_dirs = [ ".." ] + sources = [ + "AVRAsmParser.cpp", + ] +} diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn new file mode 100644 index 00000000000..40ab4378196 --- /dev/null +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn @@ -0,0 +1,61 @@ +import("//llvm/utils/TableGen/tablegen.gni") + +tablegen("AVRGenCallingConv") { + visibility = [ ":LLVMAVRCodeGen" ] + args = [ "-gen-callingconv" ] + td_file = "AVR.td" +} + +tablegen("AVRGenDAGISel") { + visibility = [ ":LLVMAVRCodeGen" ] + args = [ "-gen-dag-isel" ] + td_file = "AVR.td" +} + +static_library("LLVMAVRCodeGen") { + deps = [ + ":AVRGenCallingConv", + ":AVRGenDAGISel", + "MCTargetDesc", + "TargetInfo", + "//llvm/include/llvm/Config:llvm-config", + "//llvm/lib/CodeGen", + "//llvm/lib/CodeGen/AsmPrinter", + "//llvm/lib/CodeGen/SelectionDAG", + "//llvm/lib/IR", + "//llvm/lib/MC", + "//llvm/lib/Support", + "//llvm/lib/Target", + ] + include_dirs = [ "." ] + sources = [ + "AVRAsmPrinter.cpp", + "AVRExpandPseudoInsts.cpp", + "AVRFrameLowering.cpp", + "AVRISelDAGToDAG.cpp", + "AVRISelLowering.cpp", + "AVRInstrInfo.cpp", + "AVRMCInstLower.cpp", + "AVRRegisterInfo.cpp", + "AVRRelaxMemOperations.cpp", + "AVRSubtarget.cpp", + "AVRTargetMachine.cpp", + "AVRTargetObjectFile.cpp", + ] +} + +# This is a bit different from most build files: Due to this group +# having the directory's name, "//llvm/lib/Target/AVR" will refer to this +# target, which pulls in the code in this directory *and all subdirectories*. +# For most other directories, "//llvm/lib/Foo" only pulls in the code directly +# in "llvm/lib/Foo". The forwarding targets in //llvm/lib/Target expect this +# different behavior. +group("AVR") { + deps = [ + ":LLVMAVRCodeGen", + "AsmParser", + "Disassembler", + "MCTargetDesc", + "TargetInfo", + ] +} diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn new file mode 100644 index 00000000000..ce678f9a7e8 --- /dev/null +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn @@ -0,0 +1,23 @@ +import("//llvm/utils/TableGen/tablegen.gni") + +tablegen("AVRGenDisassemblerTables") { + visibility = [ ":Disassembler" ] + args = [ "-gen-disassembler" ] + td_file = "../AVR.td" +} + +static_library("Disassembler") { + output_name = "LLVMAVRDisassembler" + deps = [ + ":AVRGenDisassemblerTables", + "//llvm/lib/MC/MCDisassembler", + "//llvm/lib/Support", + "//llvm/lib/Target/AVR:LLVMAVRCodeGen", + "//llvm/lib/Target/AVR/MCTargetDesc", + "//llvm/lib/Target/AVR/TargetInfo", + ] + include_dirs = [ ".." ] + sources = [ + "AVRDisassembler.cpp", + ] +} diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/MCTargetDesc/BUILD.gn new file mode 100644 index 00000000000..d2d5399f4c8 --- /dev/null +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/MCTargetDesc/BUILD.gn @@ -0,0 +1,64 @@ +import("//llvm/utils/TableGen/tablegen.gni") + +tablegen("AVRGenAsmWriter") { + visibility = [ ":MCTargetDesc" ] + args = [ "-gen-asm-writer" ] + td_file = "../AVR.td" +} + +tablegen("AVRGenInstrInfo") { + visibility = [ ":MCTargetDesc" ] + args = [ "-gen-instr-info" ] + td_file = "../AVR.td" +} + +tablegen("AVRGenMCCodeEmitter") { + visibility = [ ":MCTargetDesc" ] + args = [ "-gen-emitter" ] + td_file = "../AVR.td" +} + +tablegen("AVRGenRegisterInfo") { + visibility = [ ":MCTargetDesc" ] + args = [ "-gen-register-info" ] + td_file = "../AVR.td" +} + +tablegen("AVRGenSubtargetInfo") { + visibility = [ ":MCTargetDesc" ] + args = [ "-gen-subtarget" ] + td_file = "../AVR.td" +} + +static_library("MCTargetDesc") { + output_name = "LLVMAVRDesc" + + # This should contain tablegen targets generating .inc files included + # by other targets. .inc files only used by .cpp files in this directory + # should be in deps instead. + public_deps = [ + ":AVRGenInstrInfo", + ":AVRGenRegisterInfo", + ":AVRGenSubtargetInfo", + ] + deps = [ + ":AVRGenAsmWriter", + ":AVRGenMCCodeEmitter", + "//llvm/lib/MC", + "//llvm/lib/Support", + "//llvm/lib/Target/AVR/TargetInfo", + ] + include_dirs = [ ".." ] + sources = [ + "AVRAsmBackend.cpp", + "AVRELFObjectWriter.cpp", + "AVRELFStreamer.cpp", + "AVRInstPrinter.cpp", + "AVRMCAsmInfo.cpp", + "AVRMCCodeEmitter.cpp", + "AVRMCELFStreamer.cpp", + "AVRMCExpr.cpp", + "AVRMCTargetDesc.cpp", + "AVRTargetStreamer.cpp", + ] +} diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/TargetInfo/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/TargetInfo/BUILD.gn new file mode 100644 index 00000000000..e069cac242f --- /dev/null +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/TargetInfo/BUILD.gn @@ -0,0 +1,10 @@ +static_library("TargetInfo") { + output_name = "LLVMAVRInfo" + deps = [ + "//llvm/lib/Support", + ] + include_dirs = [ ".." ] + sources = [ + "AVRTargetInfo.cpp", + ] +} diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni b/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni index 94111f7f489..11cbb01c12d 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni +++ b/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni @@ -23,6 +23,7 @@ if (llvm_targets_to_build == "host") { "AArch64", "AMDGPU", "ARM", + "AVR", "BPF", "Hexagon", "Lanai", @@ -51,6 +52,8 @@ foreach(target, llvm_targets_to_build) { # Nothing to do. } else if (target == "ARM") { llvm_build_ARM = true + } else if (target == "AVR") { + # Nothing to do. } else if (target == "BPF") { llvm_build_BPF = true } else if (target == "Hexagon") { |