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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2015-08-11 21:27:39 +0000 |
|---|---|---|
| committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2015-08-11 21:27:39 +0000 |
| commit | 2e0551f8d2c6414c11780716c66192c832e62365 (patch) | |
| tree | 0db032e3cb42a448151f2d8c46588d81d4475393 | |
| parent | 3b7e6ef8663dca6622faaf19703c2fa5b80a6f70 (diff) | |
| download | bcm5719-llvm-2e0551f8d2c6414c11780716c66192c832e62365.tar.gz bcm5719-llvm-2e0551f8d2c6414c11780716c66192c832e62365.zip | |
[MIPS] Use arch values for lock-free atomic operations
Let NaClMips32ELTargetInfo inherit arch values for maximum width lock-free
atomic operations.
Differential Revision: http://reviews.llvm.org/D11949
llvm-svn: 244675
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 7f08e9d3bc2..fa736bcfed2 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -6842,8 +6842,7 @@ void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, class NaClMips32ELTargetInfo : public Mips32ELTargetInfo { public: NaClMips32ELTargetInfo(const llvm::Triple &Triple) : - Mips32ELTargetInfo(Triple) { - MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 0; + Mips32ELTargetInfo(Triple) { } BuiltinVaListKind getBuiltinVaListKind() const override { |
