Add accessor for 64bit flag, so that we can tell when it is safe to

generate the fun in-register fp<->long instructions.

llvm-svn: 23244

2 files changed, 3 insertions, 1 deletions

diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index ca9d0778e04..3196f09ff25 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -132,6 +132,7 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
                            PowerPCSubTypeKV, PowerPCSubTypeKVSize,
                            PowerPCFeatureKV, PowerPCFeatureKVSize);
   IsGigaProcessor = (Bits & PowerPCFeatureGPUL ) != 0;
+  Is64Bit         = (Bits & PowerPCFeature64Bit) != 0;
   HasFSQRT        = (Bits & PowerPCFeatureFSqrt) != 0;
 
   // Set the boolean corresponding to the current target triple, or the default
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index 33f73b22aaf..1e428f53683 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -29,6 +29,7 @@ protected:
 
   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
   bool IsGigaProcessor;
+  bool Is64Bit;
   bool HasFSQRT;
   bool IsAIX;
   bool IsDarwin;
@@ -47,7 +48,7 @@ public:
   
   bool isAIX() const { return IsAIX; }
   bool isDarwin() const { return IsDarwin; }
-  
+  bool is64Bit() const { return Is64Bit; }
   bool isGigaProcessor() const { return IsGigaProcessor; }
 };
 } // End llvm namespace