[Pipeliner] Drop memrefs instead of creating ones with size UINT64_MAX

Absence of memory operands is treated as "aliasing everything", so
dropping them is sufficient.

Recommit r326256 with a fixed testcase.

llvm-svn: 326262

2 files changed, 9 insertions, 7 deletions

diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 3cce7b3649b..7ee4a99437e 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -3099,8 +3099,10 @@ void SwingSchedulerDAG::updateMemOperands(MachineInstr &NewMI,
       int64_t AdjOffset = Delta * Num;
       NewMemRefs[Refs++] =
           MF.getMachineMemOperand(MMO, AdjOffset, MMO->getSize());
-    } else
-      NewMemRefs[Refs++] = MF.getMachineMemOperand(MMO, 0, UINT64_MAX);
+    } else {
+      NewMI.dropMemRefs();
+      return;
+    }
   }
   NewMI.setMemRefs(NewMemRefs, NewMemRefs + NumRefs);
 }
diff --git a/llvm/test/CodeGen/Hexagon/swp-stages4.ll b/llvm/test/CodeGen/Hexagon/swp-stages4.ll
index 8e8d977c684..9e101662249 100644
--- a/llvm/test/CodeGen/Hexagon/swp-stages4.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-stages4.ll
@@ -6,14 +6,14 @@
 ; CHECK: = and
 ; CHECK: = and
 ; CHECK: = and
-; CHECK: [[REG0:(r[0-9]+)]] = and([[REG1:(r[0-9]+)]],#255)
-; CHECK-NOT: [[REG0]] = and([[REG1]],#255)
+; CHECK: r[[REG0:[0-9]+]] = and(r[[REG1:[0-9]+]],#255)
+; CHECK-NOT: r[[REG0]] = and(r[[REG1]],#255)
 ; CHECK: loop0(.LBB0_[[LOOP:.]],
 ; CHECK: .LBB0_[[LOOP]]:
-; CHECK: [[REG0]] += add
-; CHECK: [[REG2:r[0-9]+]] = and
+; CHECK: r[[REG0]] += add
 ; CHECK: = and
-; CHECK: [[REG0]] = [[REG2]]
+; CHECK: r[[REG2:[0-9]+]] = and
+; CHECK: r[[REG0]]{{:[0-9]+}} = combine(r[[REG2]],{{r[0-9]+}})
 ; CHECK: endloop
 
 ; Function Attrs: nounwind