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| author | Daniel Dunbar <daniel@zuster.org> | 2011-01-10 15:26:39 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2011-01-10 15:26:39 +0000 |
| commit | 2d01239fe79dc0386be67e90211c2030b3e7dee5 (patch) | |
| tree | 1841ce4599b8eec654dbc78bb93b6edbad010226 | |
| parent | 6e3aedd8302f448c21bd5fa043e7ab823ee97ca4 (diff) | |
| download | bcm5719-llvm-2d01239fe79dc0386be67e90211c2030b3e7dee5.tar.gz bcm5719-llvm-2d01239fe79dc0386be67e90211c2030b3e7dee5.zip | |
McARM: Mark some T2 ...s instructions as codegen only, they aren't real
instructions but are restricted pseudo forms.
llvm-svn: 123177
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index a7261ff567f..1a013dee62f 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -553,7 +553,7 @@ multiclass T2I_rbin_irs<bits<4> opcod, string opc, PatFrag opnode> { /// T2I_bin_s_irs - Similar to T2I_bin_irs except it sets the 's' bit so the /// instruction modifies the CPSR register. -let Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_bin_s_irs<bits<4> opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, PatFrag opnode, bit Commutable = 0> { @@ -700,7 +700,7 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, } // Carry setting variants -let Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode, bit Commutable = 0> { // shifted imm @@ -746,7 +746,7 @@ multiclass T2I_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode, /// T2I_rbin_s_is - Same as T2I_rbin_irs except sets 's' bit and the register /// version is not needed since this is only for codegen. -let Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { multiclass T2I_rbin_s_is<bits<4> opcod, string opc, PatFrag opnode> { // shifted imm def ri : T2TwoRegImm< @@ -2035,7 +2035,7 @@ def t2RRX : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi, } } -let Defs = [CPSR] in { +let isCodeGenOnly = 1, Defs = [CPSR] in { def t2MOVsrl_flag : T2TwoRegShiftImm< (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi, "lsrs", ".w\t$Rd, $Rm, #1", |
