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| author | Daniel Dunbar <daniel@zuster.org> | 2010-03-18 21:53:54 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2010-03-18 21:53:54 +0000 |
| commit | 2ca11082548627aac8fe71dceb754b1cde77a39d (patch) | |
| tree | 6ed2ad08698d3c8219ee00abfe1b1d1488d1c2f8 | |
| parent | 2130a3e0af723bf92c0c21b7a2cca9ed38e12e33 (diff) | |
| download | bcm5719-llvm-2ca11082548627aac8fe71dceb754b1cde77a39d.tar.gz bcm5719-llvm-2ca11082548627aac8fe71dceb754b1cde77a39d.zip | |
X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
were missing it on some movq instructions and were not including the appropriate
PCrel bias.
llvm-svn: 98880
| -rw-r--r-- | llvm/lib/Target/X86/X86MCCodeEmitter.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s | 7 |
2 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp index f533b1572c6..5afbe704e4f 100644 --- a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp @@ -166,7 +166,8 @@ EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind, // If the fixup is pc-relative, we need to bias the value to be relative to // the start of the field, not the end of the field. if (FixupKind == MCFixupKind(X86::reloc_pcrel_4byte) || - FixupKind == MCFixupKind(X86::reloc_riprel_4byte)) + FixupKind == MCFixupKind(X86::reloc_riprel_4byte) || + FixupKind == MCFixupKind(X86::reloc_riprel_4byte_movq_load)) ImmOffset -= 4; if (FixupKind == MCFixupKind(X86::reloc_pcrel_1byte)) ImmOffset -= 1; @@ -203,7 +204,8 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op, // movq loads are handled with a special relocation form which allows the // linker to eliminate some loads for GOT references which end up in the // same linkage unit. - if (MI.getOpcode() == X86::MOV64rm_TC) + if (MI.getOpcode() == X86::MOV64rm || + MI.getOpcode() == X86::MOV64rm_TC) FixupKind = X86::reloc_riprel_4byte_movq_load; // rip-relative addressing is actually relative to the *next* instruction. diff --git a/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s b/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s index d6d8dde2708..3e12cf8ba9c 100644 --- a/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s +++ b/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s @@ -32,9 +32,14 @@ addq $-424, %rax // CHECK: movq _foo@GOTPCREL(%rip), %rax // CHECK: encoding: [0x48,0x8b,0x05,A,A,A,A] -// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL, kind: reloc_riprel_4byte_movq_load +// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load movq _foo@GOTPCREL(%rip), %rax +// CHECK: movq _foo@GOTPCREL(%rip), %r14 +// CHECK: encoding: [0x4c,0x8b,0x35,A,A,A,A] +// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load +movq _foo@GOTPCREL(%rip), %r14 + // CHECK: movq (%r13,%rax,8), %r13 // CHECK: encoding: [0x4d,0x8b,0x6c,0xc5,0x00] |
