diff options
author | Simon Atanasyan <simon@atanasyan.com> | 2018-07-21 16:16:08 +0000 |
---|---|---|
committer | Simon Atanasyan <simon@atanasyan.com> | 2018-07-21 16:16:08 +0000 |
commit | 2c5b18f70f8400af9186294c05095ede8d227ab0 (patch) | |
tree | bfe98693f25edfef765771fadb479fabc8f2beb0 | |
parent | ecd1e0afdd30c136689c13b5b5ef16482b718753 (diff) | |
download | bcm5719-llvm-2c5b18f70f8400af9186294c05095ede8d227ab0.tar.gz bcm5719-llvm-2c5b18f70f8400af9186294c05095ede8d227ab0.zip |
[mips] Factor out register class selection for global base register. NFC
Factor out register class selection for global base register into a
separate function to escape long chain of ternary operators.
llvm-svn: 337647
-rw-r--r-- | llvm/lib/Target/Mips/MipsMachineFunction.cpp | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.cpp b/llvm/lib/Target/Mips/MipsMachineFunction.cpp index 1ee56d83009..81b4352670c 100644 --- a/llvm/lib/Target/Mips/MipsMachineFunction.cpp +++ b/llvm/lib/Target/Mips/MipsMachineFunction.cpp @@ -29,25 +29,27 @@ bool MipsFunctionInfo::globalBaseRegSet() const { return GlobalBaseReg; } +static const TargetRegisterClass &getGlobalBaseRegClass(MachineFunction &MF) { + auto &STI = static_cast<const MipsSubtarget &>(MF.getSubtarget()); + auto &TM = static_cast<const MipsTargetMachine &>(MF.getTarget()); + + if (STI.inMips16Mode()) + return Mips::CPU16RegsRegClass; + + if (STI.inMicroMipsMode()) + return Mips::GPRMM16RegClass; + + if (TM.getABI().IsN64()) + return Mips::GPR64RegClass; + + return Mips::GPR32RegClass; +} + unsigned MipsFunctionInfo::getGlobalBaseReg() { - // Return if it has already been initialized. - if (GlobalBaseReg) - return GlobalBaseReg; - - MipsSubtarget const &STI = - static_cast<const MipsSubtarget &>(MF.getSubtarget()); - - const TargetRegisterClass *RC = - STI.inMips16Mode() - ? &Mips::CPU16RegsRegClass - : STI.inMicroMipsMode() - ? &Mips::GPRMM16RegClass - : static_cast<const MipsTargetMachine &>(MF.getTarget()) - .getABI() - .IsN64() - ? &Mips::GPR64RegClass - : &Mips::GPR32RegClass; - return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC); + if (!GlobalBaseReg) + GlobalBaseReg = + MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); + return GlobalBaseReg; } void MipsFunctionInfo::createEhDataRegsFI() { |