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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-18 02:04:35 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-18 02:04:35 +0000 |
| commit | 2ad8bab7eec8fcc667fda7fec82f6c5e9f74dd4b (patch) | |
| tree | f32f42eb7a14a21df6c9f515eba7d8cb7915f4d1 | |
| parent | 3c34ae293cd6c17f6427a76433d2223d4b940c78 (diff) | |
| download | bcm5719-llvm-2ad8bab7eec8fcc667fda7fec82f6c5e9f74dd4b.tar.gz bcm5719-llvm-2ad8bab7eec8fcc667fda7fec82f6c5e9f74dd4b.zip | |
R600/SI: Add missing soffset operand to global atomics
llvm-svn: 229604
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/mubuf.ll | 9 |
2 files changed, 11 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index 4082b570c41..966ce894699 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -1780,8 +1780,8 @@ multiclass MUBUF_Atomic <mubuf op, string name, RegisterClass rc, defm _ADDR64 : MUBUFAtomicAddr64_m < op, name#"_addr64", (outs), (ins rc:$vdata, SReg_128:$srsrc, VReg_64:$vaddr, - mbuf_offset:$offset, slc:$slc), - name#" $vdata, $vaddr, $srsrc, 0 addr64"#"$offset"#"$slc", [], 0 + mbuf_offset:$offset, SCSrc_32:$soffset, slc:$slc), + name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#"$slc", [], 0 >; defm _OFFSET : MUBUFAtomicOffset_m < diff --git a/llvm/test/CodeGen/R600/mubuf.ll b/llvm/test/CodeGen/R600/mubuf.ll index e43c83d0b40..988e5c128e5 100644 --- a/llvm/test/CodeGen/R600/mubuf.ll +++ b/llvm/test/CodeGen/R600/mubuf.ll @@ -158,6 +158,15 @@ define void @store_sgpr_ptr_large_offset(i32 addrspace(1)* %out) #0 { ret void } +; CHECK-LABEL: {{^}}store_sgpr_ptr_large_offset_atomic: +; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000 +; CHECK: buffer_atomic_add v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, [[SOFFSET]] +define void @store_sgpr_ptr_large_offset_atomic(i32 addrspace(1)* %out) #0 { + %gep = getelementptr i32 addrspace(1)* %out, i32 32768 + %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 5 seq_cst + ret void +} + ; CHECK-LABEL: {{^}}store_vgpr_ptr: ; CHECK: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 define void @store_vgpr_ptr(i32 addrspace(1)* %out) #0 { |
