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| author | Diana Picus <diana.picus@linaro.org> | 2016-09-21 08:24:41 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2016-09-21 08:24:41 +0000 |
| commit | 2a3f066349bd376e2353da5b74faaa1d63518639 (patch) | |
| tree | e4fb7f881a1768444fa661b59cefc252c7852300 | |
| parent | 6c87f2352626d999530fde97a4ad226311bf3839 (diff) | |
| download | bcm5719-llvm-2a3f066349bd376e2353da5b74faaa1d63518639.tar.gz bcm5719-llvm-2a3f066349bd376e2353da5b74faaa1d63518639.zip | |
Revert "AArch64: Set shift bit of TLSLE HI12 add instruction"
This reverts commit r282057 because it broke the buildbots - see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/12063
llvm-svn: 282058
| -rw-r--r-- | llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/MC/AArch64/tls-add-shift.s | 12 |
2 files changed, 0 insertions, 18 deletions
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp index f5564ba4f45..5a001c49fb7 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp @@ -263,12 +263,6 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, ++MCNumFixups; - // Set the shift bit of the add instruction for relocation types - // R_AARCH64_TLSLE_ADD_TPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_HI12. - AArch64MCExpr::VariantKind RefKind = cast<AArch64MCExpr>(Expr)->getKind(); - if (RefKind == AArch64MCExpr::VK_TPREL_HI12 || - RefKind == AArch64MCExpr::VK_DTPREL_HI12) - ShiftVal = 12; return ShiftVal == 0 ? 0 : (1 << ShiftVal); } diff --git a/llvm/test/MC/AArch64/tls-add-shift.s b/llvm/test/MC/AArch64/tls-add-shift.s deleted file mode 100644 index 6e9cafe1b38..00000000000 --- a/llvm/test/MC/AArch64/tls-add-shift.s +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj < %s -o - | \ -// RUN: llvm-objdump -r -d - | FileCheck %s - - // TLS add TPREL - add x2, x1, #:tprel_hi12:var -// CHECK: add x2, x1, #0, lsl #12 -// CHECK-NEXT: R_AARCH64_TLSLE_ADD_TPREL_HI12 var - - // TLS add DTPREL - add x4, x3, #:dtprel_hi12:var -// CHECK: add x4, x3, #0, lsl #12 -// CHECK-NEXT: R_AARCH64_TLSLD_ADD_DTPREL_HI12 var |
