[IRCE] Be resilient in the face of non-simplified loops

Loops containing `indirectbr` may not be in simplified form, even after
running LoopSimplify.  Reject then gracefully, instead of tripping an
assert.

llvm-svn: 278611

2 files changed, 42 insertions, 2 deletions

diff --git a/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp b/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
index b3bd1f01232..3f9432e4651 100644
--- a/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
@@ -622,9 +622,12 @@ static bool CanBeSMin(ScalarEvolution &SE, const SCEV *S) {
 Optional<LoopStructure>
 LoopStructure::parseLoopStructure(ScalarEvolution &SE, BranchProbabilityInfo &BPI,
                                   Loop &L, const char *&FailureReason) {
-  assert(L.isLoopSimplifyForm() && "should follow from addRequired<>");
+  if (!L.isLoopSimplifyForm())
+    return None;
 
   BasicBlock *Latch = L.getLoopLatch();
+  assert(Latch && "Simplified loops only have one latch!");
+
   if (!L.isLoopExiting(Latch)) {
     FailureReason = "no loop latch";
     return None;
diff --git a/llvm/test/Transforms/IRCE/unhandled.ll b/llvm/test/Transforms/IRCE/unhandled.ll
index 0d5ff953aa3..668b318eea0 100644
--- a/llvm/test/Transforms/IRCE/unhandled.ll
+++ b/llvm/test/Transforms/IRCE/unhandled.ll
@@ -1,11 +1,12 @@
 ; RUN: opt -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
 
+; CHECK-NOT: constrained Loop at depth
+
 ; Demonstrates that we don't currently handle the general expression
 ; `A * I + B'.
 
 define void @general_affine_expressions(i32 *%arr, i32 *%a_len_ptr, i32 %n,
                                         i32 %scale, i32 %offset) {
-; CHECK-NOT: constrained Loop at depth
  entry:
   %len = load i32, i32* %a_len_ptr, !range !0
   %first.itr.check = icmp sgt i32 %n, 0
@@ -34,4 +35,40 @@ define void @general_affine_expressions(i32 *%arr, i32 *%a_len_ptr, i32 %n,
   ret void
 }
 
+; Check that we do the right thing for a loop that could not be
+; simplified due to an indirectbr.
+
+define void @multiple_latches(i32 *%arr, i32 *%a_len_ptr, i32 %n) {
+ entry:
+  %len = load i32, i32* %a_len_ptr, !range !0
+  %n.add.1 = add i32 %n, 1
+  %first.itr.check = icmp sgt i32 %n, 0
+  br i1 %first.itr.check, label %loop, label %exit
+
+ loop:
+  %idx = phi i32 [ 0, %entry ], [ %idx.next, %in.bounds ], [ %idx.next, %continue ]
+  %idx.next = add i32 %idx, 1
+  %idx.next2 = add i32 %idx, 2
+  %abc = icmp slt i32 %idx, %len
+  br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
+
+ in.bounds:
+  %addr = getelementptr i32, i32* %arr, i32 %idx
+  store i32 0, i32* %addr
+  %next = icmp slt i32 %idx.next, %n
+  br i1 %next, label %loop, label %continue
+
+ continue:
+  %next2 = icmp slt i32 %idx.next, %n.add.1
+  %dest = select i1 %next2, i8* blockaddress(@multiple_latches, %loop), i8* blockaddress(@multiple_latches, %exit)
+  indirectbr i8* %dest, [ label %loop, label %exit]
+
+ out.of.bounds:
+  ret void
+
+ exit:
+  ret void
+}
+
 !0 = !{i32 0, i32 2147483647}
+!1 = !{!"branch_weights", i32 64, i32 4}