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authorMatheus Almeida <matheus.almeida@imgtec.com>2014-06-18 14:15:42 +0000
committerMatheus Almeida <matheus.almeida@imgtec.com>2014-06-18 14:15:42 +0000
commit29e254f849de528fab014156a484aa5fbbe5128c (patch)
tree4214ab33f19372780128f8af987e21a4c43a2891
parentf10a7c963bb9f7e42dacebfaa035388e3200cb92 (diff)
downloadbcm5719-llvm-29e254f849de528fab014156a484aa5fbbe5128c.tar.gz
bcm5719-llvm-29e254f849de528fab014156a484aa5fbbe5128c.zip
[mips] Access $at only if necessary.
Summary: This patch doesn't really change the logic behind expandMemInst but it allows us to assemble .S files that use .set noat with some macros. For example: .set noat lw $k0, offset($k1) Can expand to: lui $k0, %hi(offset) addu $k0, $k0, $k1 lw $k0, %lo(offset)($k0) with no need to access $at. Reviewers: dsanders, vmedic Reviewed By: dsanders, vmedic Differential Revision: http://reviews.llvm.org/D4159 llvm-svn: 211165
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp9
-rw-r--r--llvm/test/MC/Mips/mips-expansions.s2
2 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 70a7d341d3f..8286f51b3ee 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1125,8 +1125,6 @@ void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
unsigned ImmOffset, HiOffset, LoOffset;
const MCExpr *ExprOffset;
unsigned TmpRegNum;
- unsigned AtRegNum = getReg(
- (isGP64()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, getATReg());
// 1st operand is either the source or destination register.
assert(Inst.getOperand(0).isReg() && "expected register operand kind");
unsigned RegOpNum = Inst.getOperand(0).getReg();
@@ -1149,7 +1147,12 @@ void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
// 1st instruction in expansion is LUi. For load instruction we can use
// the dst register as a temporary if base and dst are different,
// but for stores we must use $at.
- TmpRegNum = (isLoad && (BaseRegNum != RegOpNum)) ? RegOpNum : AtRegNum;
+ if (isLoad && (BaseRegNum != RegOpNum))
+ TmpRegNum = RegOpNum;
+ else
+ TmpRegNum = getReg(
+ (isGP64()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, getATReg());
+
TempInst.setOpcode(Mips::LUi);
TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));
if (isImmOpnd)
diff --git a/llvm/test/MC/Mips/mips-expansions.s b/llvm/test/MC/Mips/mips-expansions.s
index af80ccaa788..9925609ecd1 100644
--- a/llvm/test/MC/Mips/mips-expansions.s
+++ b/llvm/test/MC/Mips/mips-expansions.s
@@ -44,7 +44,9 @@
la $a0, 20($a1)
la $7,65538($8)
+ .set noat
lw $t2, symbol($a0)
+ .set at
sw $t2, symbol($t1)
lw $t2, 655483($a0)
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