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author | Craig Topper <craig.topper@intel.com> | 2019-08-07 23:16:29 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-08-07 23:16:29 +0000 |
commit | 2921abc35736a27708298fd08ac88b0cd240f696 (patch) | |
tree | ac6206a0f6f344784c0fb602ee147dce1ed6efd4 | |
parent | 30703de3a75de797d7f3d57d0199253714836d7e (diff) | |
download | bcm5719-llvm-2921abc35736a27708298fd08ac88b0cd240f696.tar.gz bcm5719-llvm-2921abc35736a27708298fd08ac88b0cd240f696.zip |
[ScalarizeMaskedMemIntrin] Add test case for expanding scatter.
This pass expands 6 intrinsics, but we only had test for 5 of
them.
llvm-svn: 368234
-rw-r--r-- | llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll new file mode 100644 index 00000000000..8b0dad8cf36 --- /dev/null +++ b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll @@ -0,0 +1,64 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S %s -scalarize-masked-mem-intrin -mtriple=x86_64-linux-gnu | FileCheck %s + +define void @scalarize_v2i64(<2 x i64*> %p, <2 x i1> %mask, <2 x i64> %value) { +; CHECK-LABEL: @scalarize_v2i64( +; CHECK-NEXT: [[SCALAR_MASK:%.*]] = bitcast <2 x i1> [[MASK:%.*]] to i2 +; CHECK-NEXT: [[TMP1:%.*]] = and i2 [[SCALAR_MASK]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i2 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[TMP2]], label [[COND_STORE:%.*]], label [[ELSE:%.*]] +; CHECK: cond.store: +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 0 +; CHECK-NEXT: [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 0 +; CHECK-NEXT: store i64 [[ELT0]], i64* [[PTR0]], align 8 +; CHECK-NEXT: br label [[ELSE]] +; CHECK: else: +; CHECK-NEXT: [[TMP3:%.*]] = and i2 [[SCALAR_MASK]], -2 +; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i2 [[TMP3]], 0 +; CHECK-NEXT: br i1 [[TMP4]], label [[COND_STORE1:%.*]], label [[ELSE2:%.*]] +; CHECK: cond.store1: +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE]], i64 1 +; CHECK-NEXT: [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i64 1 +; CHECK-NEXT: store i64 [[ELT1]], i64* [[PTR1]], align 8 +; CHECK-NEXT: br label [[ELSE2]] +; CHECK: else2: +; CHECK-NEXT: ret void +; + call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> %mask) + ret void +} + +define void @scalarize_v2i64_ones_mask(<2 x i64*> %p, <2 x i64> %value) { +; CHECK-LABEL: @scalarize_v2i64_ones_mask( +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 0 +; CHECK-NEXT: [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 0 +; CHECK-NEXT: store i64 [[ELT0]], i64* [[PTR0]], align 8 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE]], i64 1 +; CHECK-NEXT: [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i64 1 +; CHECK-NEXT: store i64 [[ELT1]], i64* [[PTR1]], align 8 +; CHECK-NEXT: ret void +; + call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 true, i1 true>) + ret void +} + +define void @scalarize_v2i64_zero_mask(<2 x i64*> %p, <2 x i64> %value) { +; CHECK-LABEL: @scalarize_v2i64_zero_mask( +; CHECK-NEXT: ret void +; + call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 false>) + ret void +} + +define void @scalarize_v2i64_const_mask(<2 x i64*> %p, <2 x i64> %value) { +; CHECK-LABEL: @scalarize_v2i64_const_mask( +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 1 +; CHECK-NEXT: [[PTR1:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 1 +; CHECK-NEXT: store i64 [[ELT1]], i64* [[PTR1]], align 8 +; CHECK-NEXT: ret void +; + call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 true>) + ret void +} + +declare void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64>, <2 x i64*>, i32, <2 x i1>) |