diff options
| author | Peter Collingbourne <peter@pcc.me.uk> | 2018-05-15 20:21:58 +0000 |
|---|---|---|
| committer | Peter Collingbourne <peter@pcc.me.uk> | 2018-05-15 20:21:58 +0000 |
| commit | 28d4ddab860d47bcf4e2d3057d9d52ed57843bbb (patch) | |
| tree | 76dfcaed21a7d13d9dec0a2183cc2196320033f1 | |
| parent | 5d1cda1bc8125f27a0d670254ecad432d608afc1 (diff) | |
| download | bcm5719-llvm-28d4ddab860d47bcf4e2d3057d9d52ed57843bbb.tar.gz bcm5719-llvm-28d4ddab860d47bcf4e2d3057d9d52ed57843bbb.zip | |
Nios2: Unbreak build.
llvm-svn: 332391
| -rw-r--r-- | llvm/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h | 5 |
2 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp b/llvm/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp index 3971630c6be..52fd344e7e2 100644 --- a/llvm/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp +++ b/llvm/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp @@ -19,6 +19,7 @@ #include "llvm/MC/MCELFObjectWriter.h" #include "llvm/MC/MCFixupKindInfo.h" #include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSubtargetInfo.h" using namespace llvm; @@ -123,9 +124,8 @@ bool Nios2AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const { // MCAsmBackend MCAsmBackend *llvm::createNios2AsmBackend(const Target &T, + const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, - const Triple &TT, StringRef CPU, const MCTargetOptions &Options) { - - return new Nios2AsmBackend(T, TT.getOS()); + return new Nios2AsmBackend(T, STI.getTargetTriple().getOS()); } diff --git a/llvm/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h b/llvm/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h index d918a066aca..e5fec96bfee 100644 --- a/llvm/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h +++ b/llvm/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h @@ -20,6 +20,7 @@ namespace llvm { class MCAsmBackend; class MCObjectWriter; class MCRegisterInfo; +class MCSubtargetInfo; class MCTargetOptions; class Target; class Triple; @@ -28,8 +29,8 @@ class raw_pwrite_stream; Target &getTheNios2Target(); -MCAsmBackend *createNios2AsmBackend(const Target &T, const MCRegisterInfo &MRI, - const Triple &TT, StringRef CPU, +MCAsmBackend *createNios2AsmBackend(const Target &T, const MCSubtargetInfo &STI, + const MCRegisterInfo &MRI, const MCTargetOptions &Options); std::unique_ptr<MCObjectWriter> |

