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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-07-11 22:30:11 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-07-11 22:30:11 +0000 |
| commit | 28550c8680453b81fa00a3b221f003ac467d15c3 (patch) | |
| tree | cd797c77a96269e22e3a0a3062d93746dc8c20ad | |
| parent | a35a7d49e5e904bedd0bb7623ec04af499b5e9be (diff) | |
| download | bcm5719-llvm-28550c8680453b81fa00a3b221f003ac467d15c3.tar.gz bcm5719-llvm-28550c8680453b81fa00a3b221f003ac467d15c3.zip | |
[AMDGPU] Fixed asan error with agpr spilling
Instruction was used after it was erased.
llvm-svn: 365837
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp index abfe89491e7..9a93e84d80e 100644 --- a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp +++ b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp @@ -283,8 +283,11 @@ bool SILowerSGPRSpills::runOnMachineFunction(MachineFunction &MF) { int FI = MI.getOperand(FIOp).getIndex(); unsigned VReg = TII->getNamedOperand(MI, AMDGPU::OpName::vdata) ->getReg(); - if (FuncInfo->allocateVGPRSpillToAGPR(MF, FI, TRI->isAGPR(MRI, VReg))) + if (FuncInfo->allocateVGPRSpillToAGPR(MF, FI, + TRI->isAGPR(MRI, VReg))) { TRI->eliminateFrameIndex(MI, 0, FIOp, nullptr); + continue; + } } if (!TII->isSGPRSpill(MI)) |
