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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-06-25 15:42:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-06-25 15:42:20 +0000 |
| commit | 2811a20f779d666965f3e4f900bd1f515b809bd1 (patch) | |
| tree | 62b9db501e227e0ad9a4d0a43d22e94d820355f5 | |
| parent | b3feccd7fa7deef032237e11e7c80ced610b0b53 (diff) | |
| download | bcm5719-llvm-2811a20f779d666965f3e4f900bd1f515b809bd1.tar.gz bcm5719-llvm-2811a20f779d666965f3e4f900bd1f515b809bd1.zip | |
AMDGPU: Remove commented out code
llvm-svn: 335486
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 77fa76d1cdf..b8e6c114886 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -1112,12 +1112,10 @@ SDValue SITargetLowering::lowerKernargMemParameter( PointerType *PtrTy = PointerType::get(Ty, AMDGPUASI.CONSTANT_ADDRESS); MachinePointerInfo PtrInfo(UndefValue::get(PtrTy)); - // Try to avoid using an extload by loading earlier than the argument address, // and extracting the relevant bits. The load should hopefully be merged with // the previous argument. if (Align < 4) { - //if (MemVT.getStoreSize() < 4) { assert(MemVT.getStoreSize() < 4); int64_t AlignDownOffset = alignDown(Offset, 4); int64_t OffsetDiff = Offset - AlignDownOffset; |
