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| author | Cameron Zwarich <zwarich@apple.com> | 2011-05-26 03:41:12 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-05-26 03:41:12 +0000 |
| commit | 26ddb1211892f2add88f0466833269a9112cfc95 (patch) | |
| tree | 929ed825f084fafacb792ed86c3e6e4535413133 | |
| parent | 006e1c39d0e17370352780ce9ffedda63b66f6bf (diff) | |
| download | bcm5719-llvm-26ddb1211892f2add88f0466833269a9112cfc95.tar.gz bcm5719-llvm-26ddb1211892f2add88f0466833269a9112cfc95.zip | |
Mark tBX as an indirect branch rather than a return.
llvm-svn: 132107
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb.td | 16 |
2 files changed, 9 insertions, 9 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index ca1463083b4..75b397e4bbe 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -1863,7 +1863,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { } { MCInst TmpInst; - TmpInst.setOpcode(ARM::tBX_RET_vararg); + TmpInst.setOpcode(ARM::tBX); TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); // Predicate. TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index a9ca7e5a37d..350e0bae6b8 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -361,14 +361,6 @@ def tADDspr : TIt<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iALUr, // let isReturn = 1, isTerminator = 1, isBarrier = 1 in { - def tBX : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bx${p}\t$Rm", []>, - T1Special<{1,1,0,?}> { - // A6.2.3 & A8.6.25 - bits<4> Rm; - let Inst{6-3} = Rm; - let Inst{2-0} = 0b000; - } - def tBX_RET : TI<(outs), (ins), IIC_Br, "bx\tlr", [(ARMretflag)]>, T1Special<{1,1,0,?}> { @@ -391,6 +383,14 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1 in { // Indirect branches let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { + def tBX : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bx${p}\t$Rm", []>, + T1Special<{1,1,0,?}> { + // A6.2.3 & A8.6.25 + bits<4> Rm; + let Inst{6-3} = Rm; + let Inst{2-0} = 0b000; + } + def tBRIND : TI<(outs), (ins GPR:$Rm), IIC_Br, "mov\tpc, $Rm", |
